[Intel-gfx] [PATCH] drm/i915: Remove zombie async flip vt-d w/a
Ville Syrjala
ville.syrjala at linux.intel.com
Wed Dec 8 15:00:50 UTC 2021
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
This async flip vt-d w/a was moved to a different place in
commit 7d396cacaea6 ("drm/i195: Make the async flip VT-d workaround
dynamic") but the drm-intel-fixes cherry-pick commit b2d73debfdc1
("drm/i915: Extend the async flip VT-d w/a to skl/bxt") resurrected
the original code as well. So now we have this w/a in two places.
Remove the resurrected zombie code.
Not done as a revert to hopefully prevent any kind of
automagic stable backport.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fe3787425780..31767c583cd0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -78,8 +78,6 @@ struct intel_wm_config {
static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
{
- enum pipe pipe;
-
if (HAS_LLC(dev_priv)) {
/*
* WaCompressedResourceDisplayNewHashMode:skl,kbl
@@ -93,16 +91,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
SKL_DE_COMPRESSED_HASH_MODE);
}
- for_each_pipe(dev_priv, pipe) {
- /*
- * "Plane N strech max must be programmed to 11b (x1)
- * when Async flips are enabled on that plane."
- */
- if (!IS_GEMINILAKE(dev_priv) && intel_vtd_active(dev_priv))
- intel_uncore_rmw(&dev_priv->uncore, CHICKEN_PIPESL_1(pipe),
- SKL_PLANE1_STRETCH_MAX_MASK, SKL_PLANE1_STRETCH_MAX_X1);
- }
-
/* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl,cfl */
intel_uncore_write(&dev_priv->uncore, CHICKEN_PAR1_1,
intel_uncore_read(&dev_priv->uncore, CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP);
--
2.32.0
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