[Intel-gfx] [PATCH 4/4] drm/i915: enforce min page size for scratch

Andi Shyti andi.shyti at intel.com
Wed Dec 8 16:12:06 UTC 2021


Hi Matt and Ram,

On Wed, Dec 08, 2021 at 07:46:13PM +0530, Ramalingam C wrote:
> From: Matthew Auld <matthew.auld at intel.com>
> 
> If the device needs 64K minimum GTT pages for device local-memory,
> like on XEHPSDV, then we need to fail the allocation if we can't
> meet it, instead of falling back to 4K pages, otherwise we can't
> safely support the insertion of device local-memory pages for
> this vm, since the HW expects the correct physical alignment and
> size for every PTE, if we mark the page-table as 64K GTT mode.
> 
> v2: s/userpsace/userspace [Thomas]
> 
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
> Reviewed-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>

Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>

Andi


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