[Intel-gfx] [PATCH v2 1/4] drm/i915/fbc: Parametrize FBC register offsets

[Ville Syrjälä]

On Wed, Dec 15, 2021 at 09:05:03AM +0000, Sarvela, Tomi P wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > On Tue, Dec 14, 2021 at 06:25:43PM +0200, Ville Syrjälä wrote:
> > > On Mon, Dec 13, 2021 at 09:54:04PM +0200, Jani Nikula wrote:
> > > > On Mon, 13 Dec 2021, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> > > >
> > > > This one is only used in gvt, anyway. And that actually makes me wonder
> > > > if this should be breaking the build. Does CI not have gvt enabled?
> > >
> > > Hmm. I thought it was enabled in CI, but maybe not. I've often broken
> > > gvt with register define changes but I've always caught it before
> > > pushing. I think I have gvt enabled in my "make sure all commits build
> > > before I push" test config, so maybe that's where I caught most of them.
> > >
> > > Tomi, can we enable gvt in ci builds to make sure it at least still
> > > builds?
> > 
> > Actually cc Tomi..
> 
> GVT-d is enabled and tested by fi-bdw-gvtdvm.

We're talking about the other gvt (whatever it was called), ie.
CONFIG_DRM_I915_GVT.

-- 
Ville Syrjälä
Intel