[Intel-gfx] [PATCH 11/15] drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable()

[Lucas De Marchi]

On Mon, Feb 01, 2021 at 08:33:39PM +0200, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
>The other DDI .enable_clock() functions are trying to protect us
>against pll==NULL. A bit tempted to throw out all the WARNs as
>just unnecessary noise, but I guess they might have some use
>when poking around the shared_dpll code (not sure it wouldn't
>oops elsewhere though). So let's unify it all and sprinkle in
>the missing WARNs for icl/dg1.
>
>Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>index 93552f3c2c43..b4984bbd7817 100644
>--- a/drivers/gpu/drm/i915/display/intel_ddi.c
>+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>@@ -3165,6 +3165,9 @@ static void dg1_ddi_enable_clock(struct intel_encoder *encoder,
> 	struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> 	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>
>+	if (drm_WARN_ON(&dev_priv->drm, !pll))
>+		return;
>+
> 	/*
> 	 * If we fail this, something went very wrong: first 2 PLLs should be
> 	 * used by first 2 phys and last 2 PLLs by last phys
>@@ -3207,6 +3210,9 @@ static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder,
> 	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> 	i915_reg_t reg = icl_dpclka_cfgcr0_reg(dev_priv, phy);
>
>+	if (drm_WARN_ON(&dev_priv->drm, !pll))
>+		return;
>+
> 	mutex_lock(&dev_priv->dpll.lock);
>
> 	/*
>-- 
>2.26.2
>
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