[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the DDI clock routing mess

Vudum, Lakshminarayana lakshminarayana.vudum at intel.com
Mon Feb 1 21:08:57 UTC 2021


Re-reported.

-----Original Message-----
From: Ville Syrjälä <ville.syrjala at linux.intel.com> 
Sent: Monday, February 1, 2021 12:34 PM
To: intel-gfx at lists.freedesktop.org
Cc: Vudum, Lakshminarayana <lakshminarayana.vudum at intel.com>
Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915: Clean up the DDI clock routing mess

On Mon, Feb 01, 2021 at 08:12:11PM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Clean up the DDI clock routing mess
> URL   : https://patchwork.freedesktop.org/series/86544/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_9713 -> Patchwork_19556 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_19556 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_19556, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_19556:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt at kms_chamelium@common-hpd-after-suspend:
>     - fi-icl-u2:          [PASS][1] -> [DMESG-WARN][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9713/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/fi-icl-u2/igt
> @kms_chamelium at common-hpd-after-suspend.html

<3> [153.691774] i915 0000:00:02.0: [drm] *ERROR* Failed to read DPCD register 0x92

Seems to be
https://gitlab.freedesktop.org/drm/intel/-/issues/2868
except not yet tracked for icl.

That register seems to be related to the HDMI 2.1 PCON stuff.

--
Ville Syrjälä
Intel


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