[Intel-gfx] [PATCH] drm/i915/gen9bc: Handle TGP PCH during suspend/resume

[Surendrakumar Upadhyay, TejaskumarX]

> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Sent: 28 January 2021 04:46
> To: Surendrakumar Upadhyay, TejaskumarX
> <tejaskumarx.surendrakumar.upadhyay at intel.com>
> Cc: intel-gfx at lists.freedesktop.org; Pandey, Hariom
> <hariom.pandey at intel.com>; Roper, Matthew D
> <matthew.d.roper at intel.com>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gen9bc: Handle TGP PCH during
> suspend/resume
> 
> On Wed, Jan 27, 2021 at 03:38:30PM +0530, Tejas Upadhyay wrote:
> > For Legacy S3 suspend/resume GEN9 BC needs to enable and setup TGP
> > PCH.
> >
> > Cc: Matt Roper <matthew.d.roper at intel.com>
> > Signed-off-by: Tejas Upadhyay
> > <tejaskumarx.surendrakumar.upadhyay at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 36
> > ++++++++++++++++++++++++---------
> >  1 file changed, 27 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > b/drivers/gpu/drm/i915/i915_irq.c index a31980f69120..6dcefc3e24ac
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -3026,8 +3026,20 @@ static void gen8_irq_reset(struct
> drm_i915_private *dev_priv)
> >  	GEN3_IRQ_RESET(uncore, GEN8_DE_MISC_);
> >  	GEN3_IRQ_RESET(uncore, GEN8_PCU_);
> >
> > -	if (HAS_PCH_SPLIT(dev_priv))
> > +	if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> > +		GEN3_IRQ_RESET(uncore, SDE);
> > +	else if (HAS_PCH_SPLIT(dev_priv))
> >  		ibx_irq_reset(dev_priv);
> > +
> > +	/* Wa_14010685332:cnp/cmp,tgp,adp */
> > +	if (INTEL_PCH_TYPE(dev_priv) == PCH_CNP ||
> > +	    (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP &&
> > +	    INTEL_PCH_TYPE(dev_priv) < PCH_DG1)) {
> > +		intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
> > +				 SBCLK_RUN_REFCLK_DIS,
> SBCLK_RUN_REFCLK_DIS);
> > +		intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
> > +				 SBCLK_RUN_REFCLK_DIS, 0);
> > +	}
> 
> Time to refactor instead of copypasta.
Do you expect below? :

If ((INTEL_PCH_TYPE(dev_priv) == PCH_TGP) {
	intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
				 SBCLK_RUN_REFCLK_DIS,
SBCLK_RUN_REFCLK_DIS);
		intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
				 SBCLK_RUN_REFCLK_DIS, 0);
}
> 
> >  }
> >
> >  static void gen11_display_irq_reset(struct drm_i915_private
> > *dev_priv) @@ -3442,6 +3454,9 @@ static void spt_hpd_irq_setup(struct
> drm_i915_private *dev_priv)
> >  	ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
> >
> >  	spt_hpd_detection_setup(dev_priv);
> > +
> > +	if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> > +		icp_hpd_irq_setup(dev_priv);
> >  }
> >
> >  static u32 ilk_hotplug_enables(struct drm_i915_private *i915, @@
> > -3729,9 +3744,19 @@ static void gen8_de_irq_postinstall(struct
> drm_i915_private *dev_priv)
> >  	}
> >  }
> >
> > +static void icp_irq_postinstall(struct drm_i915_private *dev_priv) {
> > +	struct intel_uncore *uncore = &dev_priv->uncore;
> > +	u32 mask = SDE_GMBUS_ICP;
> > +
> > +	GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff); }
> > +
> >  static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
> > {
> > -	if (HAS_PCH_SPLIT(dev_priv))
> > +	if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> > +		icp_irq_postinstall(dev_priv);
> > +	else if (HAS_PCH_SPLIT(dev_priv))
> >  		ibx_irq_postinstall(dev_priv);
> >
> >  	gen8_gt_irq_postinstall(&dev_priv->gt);
> > @@ -3740,13 +3765,6 @@ static void gen8_irq_postinstall(struct
> drm_i915_private *dev_priv)
> >  	gen8_master_intr_enable(dev_priv->uncore.regs);
> >  }
> >
> > -static void icp_irq_postinstall(struct drm_i915_private *dev_priv) -{
> > -	struct intel_uncore *uncore = &dev_priv->uncore;
> > -	u32 mask = SDE_GMBUS_ICP;
> > -
> > -	GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff);
> > -}
> >
> >  static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
> > {
> > --
> > 2.30.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrjälä
> Intel