[Intel-gfx] [CI 3/8] drm/i915/selftests: Replace the unbounded set-domain with an explicit wait
Chris Wilson
chris at chris-wilson.co.uk
Wed Feb 3 09:02:00 UTC 2021
After running client_blt, we flush the object by changing its domain.
This causes us to wait forever instead of an bounded wait suitable for
the selftest timeout. So do an explicit wait with a suitable timeout --
which in turn means we have to limit the size of the object/blit to run
within reason.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld at intel.com>
---
.../i915/gem/selftests/i915_gem_client_blt.c | 26 ++++++++++++++-----
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index 6a674a7994df..175581724d44 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
@@ -23,12 +23,19 @@ static int __igt_client_fill(struct intel_engine_cs *engine)
I915_RND_STATE(prng);
IGT_TIMEOUT(end);
u32 *vaddr;
+ u64 limit;
int err = 0;
+ /* Try to keep the blits within the timeout */
+ limit = min_t(u64, ce->vm->total >> 4,
+ jiffies_to_msecs(i915_selftest.timeout_jiffies) * SZ_2M);
+ if (!limit)
+ limit = SZ_4K;
+
intel_engine_pm_get(engine);
do {
const u32 max_block_size = S16_MAX * PAGE_SIZE;
- u32 sz = min_t(u64, ce->vm->total >> 4, prandom_u32_state(&prng));
+ u32 sz = min_t(u64, limit, prandom_u32_state(&prng));
u32 phys_sz = sz % (max_block_size + 1);
u32 val = prandom_u32_state(&prng);
u32 i;
@@ -73,13 +80,20 @@ static int __igt_client_fill(struct intel_engine_cs *engine)
if (err)
goto err_unpin;
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_cpu_domain(obj, false);
- i915_gem_object_unlock(obj);
- if (err)
+ err = i915_gem_object_wait(obj,
+ I915_WAIT_INTERRUPTIBLE,
+ 2 * i915_selftest.timeout_jiffies);
+ if (err) {
+ pr_err("%s fill %zxB timed out\n",
+ engine->name, obj->base.size);
goto err_unpin;
+ }
- for (i = 0; i < huge_gem_object_phys_size(obj) / sizeof(u32); ++i) {
+ for (i = 0;
+ i < huge_gem_object_phys_size(obj) / sizeof(u32);
+ i += 17) {
+ if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
+ clflush(&vaddr[i]);
if (vaddr[i] != val) {
pr_err("vaddr[%u]=%x, expected=%x\n", i,
vaddr[i], val);
--
2.20.1
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