[Intel-gfx] [PATCH v2] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10

Jani Nikula jani.nikula at linux.intel.com
Mon Feb 8 11:13:13 UTC 2021


On Mon, 08 Feb 2021, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
> Legacy LSPCON chip from MCA and Parade is only used for platforms
> between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
>
> v2: Added the missing 'drm/' to subject (Jani N).
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> Acked-by: Jani Nikula <jani.nikula at intel.com>

Never mind, I pushed the earlier patch and fixed the prefix while
applying.

In general, there's no need to resend for tiny edits in commit log that
can be done while applying.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/i915_drv.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4fc9a8691873..fd04fc434ca6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1763,7 +1763,7 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
>  
>  #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>  
> -#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
> +#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
>  
>  /* DPF == dynamic parity feature */
>  #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)

-- 
Jani Nikula, Intel Open Source Graphics Center


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