[Intel-gfx] [PATCH] drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entries

[Matt Roper]

On Tue, Feb 09, 2021 at 09:42:38AM -0800, José Roberto de Souza wrote:
> Set the right BW buddy page mask for new memory types.
> 
> BSpec: 49218
> Cc: Clint Taylor <clinton.a.taylor at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index e17b1ca356c3..f00c1750febd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -5317,17 +5317,25 @@ struct buddy_page_mask {
>  
>  static const struct buddy_page_mask tgl_buddy_page_masks[] = {
>  	{ .num_channels = 1, .type = INTEL_DRAM_DDR4,   .page_mask = 0xF },
> +	{ .num_channels = 1, .type = INTEL_DRAM_DDR5,	.page_mask = 0xF },
>  	{ .num_channels = 2, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x1C },
> +	{ .num_channels = 2, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x1C },
>  	{ .num_channels = 2, .type = INTEL_DRAM_DDR4,   .page_mask = 0x1F },
> +	{ .num_channels = 2, .type = INTEL_DRAM_DDR5,   .page_mask = 0x1E },
>  	{ .num_channels = 4, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x38 },
> +	{ .num_channels = 4, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x38 },
>  	{}
>  };
>  
>  static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
>  	{ .num_channels = 1, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x1 },
>  	{ .num_channels = 1, .type = INTEL_DRAM_DDR4,   .page_mask = 0x1 },
> +	{ .num_channels = 1, .type = INTEL_DRAM_DDR5,   .page_mask = 0x1 },
> +	{ .num_channels = 1, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x1 },
>  	{ .num_channels = 2, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x3 },
>  	{ .num_channels = 2, .type = INTEL_DRAM_DDR4,   .page_mask = 0x3 },
> +	{ .num_channels = 2, .type = INTEL_DRAM_DDR5,   .page_mask = 0x3 },
> +	{ .num_channels = 2, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x3 },
>  	{}
>  };
>  
> -- 
> 2.30.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795