[Intel-gfx] [PATCH 4/6] drm/i915/selftests: Restrict partial-tiling to write into the object

[Chris Wilson]

Check that the address we are about to write into maps into the object
to avoid stray writes into the scratch page.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 39293d98f34d..df558ce95a94 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -104,9 +104,12 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
 	GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
 	GEM_BUG_ON(i915_gem_object_get_stride(obj) != tile->stride);
 
-	page = i915_prandom_u32_max_state(npages, prng);
-	view = compute_partial_view(obj, page, MIN_CHUNK_PAGES);
+	do {
+		page = i915_prandom_u32_max_state(npages, prng);
+		offset = tiled_offset(tile, page << PAGE_SHIFT);
+	} while (offset >= obj->base.size);
 
+	view = compute_partial_view(obj, page, MIN_CHUNK_PAGES);
 	vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
 	if (IS_ERR(vma)) {
 		pr_err("Failed to pin partial view: offset=%lu; err=%d\n",
@@ -129,10 +132,6 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
 	iowrite32(page, io + n * PAGE_SIZE / sizeof(*io));
 	i915_vma_unpin_iomap(vma);
 
-	offset = tiled_offset(tile, page << PAGE_SHIFT);
-	if (offset >= obj->base.size)
-		goto out;
-
 	intel_gt_flush_ggtt_writes(&to_i915(obj->base.dev)->gt);
 
 	p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
-- 
2.20.1