[Intel-gfx] [PATCH 1/2] drm/i915: FPGA_DBG is display-specific

[Lucas De Marchi]

On Fri, Feb 12, 2021 at 01:19:24PM -0800, Matt Roper wrote:
>Although the bspec's description doesn't make it very clear, the
>hardware architects have confirmed that the FPGA_DBG register that we
>use to check for unclaimed MMIO accesses is display-specific and will
>only properly flag unclaimed MMIO transactions for registers in the
>display range.  If a platform doesn't have display, FPGA_DBG itself will
>not be available and should not be checked.  Let's move the feature flag
>into intel_device_info.display to more accurately reflect this.
>
>Given that we now know FPGA_DBG is display-specific, it could be argued
>that we should only check it on out intel_de_*() functions.  However
>let's not make that change right now; keeping the checks in all of the
>existing locations still helps us catch cases where regular
>intel_uncore_*() functions use bad MMIO offset math / base addresses and
>accidentally wind up landing within an unused area within the display
>MMIO range.  It will also help catch cases where userspace-initiated
>MMIO (e.g., IGT's intel_reg tool) attempt to read bad offsets within the
>display range.
>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/i915/i915_pci.c          | 4 ++--
> drivers/gpu/drm/i915/intel_device_info.h | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>index eff7155db2fd..a9f24f2bda33 100644
>--- a/drivers/gpu/drm/i915/i915_pci.c
>+++ b/drivers/gpu/drm/i915/i915_pci.c
>@@ -538,7 +538,7 @@ static const struct intel_device_info vlv_info = {
> 	.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
> 	.display.has_ddi = 1, \
>-	.has_fpga_dbg = 1, \
>+	.display.has_fpga_dbg = 1, \
> 	.display.has_psr = 1, \
> 	.display.has_psr_hw_tracking = 1, \
> 	.display.has_dp_mst = 1, \
>@@ -689,7 +689,7 @@ static const struct intel_device_info skl_gt4_info = {
> 		BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> 	.has_64bit_reloc = 1, \
> 	.display.has_ddi = 1, \
>-	.has_fpga_dbg = 1, \
>+	.display.has_fpga_dbg = 1, \
> 	.display.has_fbc = 1, \
> 	.display.has_hdcp = 1, \
> 	.display.has_psr = 1, \
>diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>index e6ca1023ffcf..d44f64b57b7a 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.h
>+++ b/drivers/gpu/drm/i915/intel_device_info.h
>@@ -118,7 +118,6 @@ enum intel_ppgtt_type {
> 	func(has_64bit_reloc); \
> 	func(gpu_reset_clobbers_display); \
> 	func(has_reset_engine); \
>-	func(has_fpga_dbg); \
> 	func(has_global_mocs); \
> 	func(has_gt_uc); \
> 	func(has_l3_dpf); \
>@@ -145,6 +144,7 @@ enum intel_ppgtt_type {
> 	func(has_dsb); \
> 	func(has_dsc); \
> 	func(has_fbc); \
>+	func(has_fpga_dbg); \
> 	func(has_gmch); \
> 	func(has_hdcp); \
> 	func(has_hotplug); \
>-- 
>2.25.4
>