[Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula at intel.com>; Varide, Nischal <nischal.varide at intel.com>
> Subject: [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check
> 
> For starters, we expect the state to be zero, as we don't enable MSO anywhere.
> 
> v2: Refer to splitter.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar at intel.com>

> Cc: Nischal Varide <nischal.varide at intel.com>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index fe9985bd5786..3059a07b8c36 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9326,6 +9326,10 @@ intel_pipe_config_compare(const struct intel_crtc_state
> *current_config,
>  	PIPE_CONF_CHECK_I(dsc.dsc_split);
>  	PIPE_CONF_CHECK_I(dsc.compressed_bpp);
> 
> +	PIPE_CONF_CHECK_BOOL(splitter.enable);
> +	PIPE_CONF_CHECK_I(splitter.link_count);
> +	PIPE_CONF_CHECK_I(splitter.pixel_overlap);
> +
>  	PIPE_CONF_CHECK_I(mst_master_transcoder);
> 
>  	PIPE_CONF_CHECK_BOOL(vrr.enable);
> --
> 2.20.1
> 
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