[Intel-gfx] [PATCH 2/2] drm/i915/adl_s: Add ADL-S platform info and PCI ids

[Lucas De Marchi]

On Mon, Jan 11, 2021 at 11:30:00AM -0800, Aditya Swarup wrote:
>From: Caz Yokoyama <caz.yokoyama at intel.com>
>
>- Add the initial platform information for Alderlake-S.
>- Specify ppgtt_size value
>- Add dma_mask_size
>- Add ADLS REVIDs
>- HW tracking(Selective Update Tracking Enable) has been
>  removed from ADLS. Disable PSR2 till we enable software/
>  manual tracking.
>
>v2:
>- Add support for different ADLS SOC steppings to select
>  correct GT/DISP stepping based on Bspec 53655 based on
>  feedback from Matt Roper.(aswarup)
>
>v3:
>- Make display/gt steppings info generic for reuse with TGL and ADLS.
>- Modify the macros to reuse tgl_revids_get()
>- Add HTI support to adls device info.(mdroper)
>
>v4:
>- Rebase on TGL patch for applying WAs based on stepping info from
>  Matt Roper's feedback.(aswarup)
>
>v5:
>- Replace macros with PCI IDs in revid to stepping table.
>
>Bspec: 53597
>Bspec: 53648
>Bspec: 53655
>Bspec: 48028
>Bspec: 53650
>BSpec: 50422
>
>Cc: José Roberto de Souza <jose.souza at intel.com>
>Cc: Matt Roper <matthew.d.roper at intel.com>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
>Cc: Jani Nikula <jani.nikula at intel.com>
>Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
>Cc: Imre Deak <imre.deak at intel.com>
>Signed-off-by: Caz Yokoyama <caz.yokoyama at intel.com>
>Signed-off-by: Aditya Swarup <aditya.swarup at intel.com>
>---
> drivers/gpu/drm/i915/gt/intel_workarounds.c |  8 ++++++
> drivers/gpu/drm/i915/i915_drv.h             | 27 ++++++++++++++++++++-
> drivers/gpu/drm/i915/i915_pci.c             | 13 ++++++++++
> drivers/gpu/drm/i915/intel_device_info.c    |  1 +
> drivers/gpu/drm/i915/intel_device_info.h    |  1 +
> include/drm/i915_pciids.h                   | 11 +++++++++
> 6 files changed, 60 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>index 111d01e2f81e..cb9220925fe7 100644
>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>@@ -84,6 +84,14 @@ const struct i915_rev_steppings tgl_revid_step_tbl[] = {
> 	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
> };
>
>+const struct i915_rev_steppings adls_revid_step_tbl[] = {
>+	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>+	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>+	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
>+	[0x8] = { .gt_stepping = STEP_C0, .disp_stepping = STEP_B0 },
>+	[0xC] = { .gt_stepping = STEP_D0, .disp_stepping = STEP_C0 },
>+};
>+
> static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> {
> 	wal->name = name;
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 11d6e8abde46..8d8a046a7b0c 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -1417,6 +1417,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define IS_TIGERLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_TIGERLAKE)
> #define IS_ROCKETLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE)
> #define IS_DG1(dev_priv)        IS_PLATFORM(dev_priv, INTEL_DG1)
>+#define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S)
> #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
> 				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
> #define IS_BDW_ULT(dev_priv) \
>@@ -1560,6 +1561,7 @@ extern const struct i915_rev_steppings kbl_revids[];
>
> enum {
> 	STEP_A0,
>+	STEP_A2,
> 	STEP_B0,
> 	STEP_B1,
> 	STEP_C0,
>@@ -1568,9 +1570,11 @@ enum {
>
> #define TGL_UY_REVID_STEP_TBL_SIZE	4
> #define TGL_REVID_STEP_TBL_SIZE		2
>+#define ADLS_REVID_STEP_TBL_SIZE	13
>
> extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
> extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
>+extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
>
> static inline const struct i915_rev_steppings *
> tgl_stepping_get(struct drm_i915_private *dev_priv)
>@@ -1579,7 +1583,10 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
> 	u8 size;
> 	const struct i915_rev_steppings *revid_step_tbl;
>
>-	if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>+	if (IS_ALDERLAKE_S(dev_priv)) {
>+		revid_step_tbl = adls_revid_step_tbl;
>+		size = ARRAY_SIZE(adls_revid_step_tbl);
>+	} else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> 		revid_step_tbl = tgl_uy_revid_step_tbl;
> 		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> 	} else {
>@@ -1621,6 +1628,24 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
> #define IS_DG1_REVID(p, since, until) \
> 	(IS_DG1(p) && IS_REVID(p, since, until))
>
>+#define ADLS_REVID_A0		0x0
>+#define ADLS_REVID_A2		0x1
>+#define ADLS_REVID_B0		0x4
>+#define ADLS_REVID_G0		0x8
>+#define ADLS_REVID_C0		0xC /*Same as H0 ADLS SOC stepping*/
>+
>+extern const struct i915_rev_steppings adls_revids[];

this can be removed now, otherwise lgtm

Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi