[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v6] drm/i915/display/vrr: Create VRR file and add VRR capability check (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [CI,v6] drm/i915/display/vrr: Create VRR file and add VRR capability check (rev2)
URL   : https://patchwork.freedesktop.org/series/86200/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
62a318f6e2ec drm/i915/display/vrr: Create VRR file and add VRR capability check
-:40: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 61 lines checked
f52206f4d61d drm/i915/display/dp: Attach and set drm connector VRR property
215e991209ec drm/i915: Store framestart_delay in dev_priv
-:104: CHECK:SPACING: spaces preferred around that '-' (ctx:WxV)
#104: FILE: drivers/gpu/drm/i915/display/intel_display.c:15189:
+		val |= HSW_FRAME_START_DELAY(dev_priv->framestart_delay -1);
 		                                                        ^

total: 0 errors, 0 warnings, 1 checks, 102 lines checked
b6d69ba3c3f2 drm/i915: Extract intel_mode_vblank_start()
e09f65af8a5b drm/i915: Extract intel_crtc_scanlines_since_frame_timestamp()
d042de272b5c drm/i915/display/dp: Compute VRR state in atomic_check
348ab07c113b drm/i915/display/dp: Do not enable PSR if VRR is enabled
48ea525edcf8 drm/i915/display: VRR + DRRS cannot be enabled together
9b63d63f6613 drm/i915: Rename VRR_CTL reg fields
7fafcbdaedbf drm/i915/display/vrr: Configure and enable VRR in modeset enable
9afbc5d3d2c7 drm/i915/display/vrr: Send VRR push to flip the frame
f58744d7fa53 drm/i915/display/vrr: Disable VRR in modeset disable path
fd521ea70cf2 drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink
fccf4001ed51 drm/i915/display: Add HW state readout for VRR
-:59: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#59: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:164:
+		crtc_state->vrr.pipeline_full = REG_FIELD_GET(VRR_CTL_PIPELINE_FULL_MASK, trans_vrr_ctl);

-:61: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:166:
+		crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1;

total: 0 errors, 2 warnings, 0 checks, 46 lines checked
7422bf611bda drm/i915/display: Helpers for VRR vblank min and max start
e4b1a4ab29b6 drm/i915: Add vrr state dump
58b14daa2aa2 drm/i915: Fix vblank timestamps with VRR
-:11: WARNING:TYPO_SPELLING: 'minumum' may be misspelled - perhaps 'minimum'?
#11: 
off the scanline counter when it exceeds the minumum vtotal.
                                             ^^^^^^^

-:87: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#87: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:697:
+#define I915_MODE_FLAG_VRR (1<<6)
                              ^

total: 0 errors, 1 warnings, 1 checks, 81 lines checked
e6f1e331f995 drm/i915: Fix vblank evasion with vrr