[Intel-gfx] [PATCH v3 16/20] drm/msm: always wait for the exclusive fence
Daniel Vetter
daniel.vetter at ffwll.ch
Fri Jul 9 09:15:40 UTC 2021
On Fri, Jul 9, 2021 at 10:48 AM Christian König
<ckoenig.leichtzumerken at gmail.com> wrote:
> Am 08.07.21 um 19:37 schrieb Daniel Vetter:
> > From: Christian König <ckoenig.leichtzumerken at gmail.com>
> >
> > Drivers also need to to sync to the exclusive fence when
> > a shared one is present.
> >
> > Signed-off-by: Christian König <christian.koenig at amd.com>
> > [danvet: Not that hard to compile-test on arm ...]
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Cc: Rob Clark <robdclark at gmail.com>
> > Cc: Sean Paul <sean at poorly.run>
> > Cc: linux-arm-msm at vger.kernel.org
> > Cc: freedreno at lists.freedesktop.org
>
> Wondering a bit why you have that in this patch set now.
>
> But any objections that we push this now?
Cover letter of the first one version explained that I just wanted to
have all the msm fixes in this series, for completeness. But yeah I
thought I put an r-b on your series for this? There was one patch
where I was unhappy with the docs, but there's a new patch for that
now here.
-Daniel
> Thanks,
> Christian.
>
> > ---
> > drivers/gpu/drm/msm/msm_gem.c | 16 +++++++---------
> > 1 file changed, 7 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
> > index 141178754231..d9c4f1deeafb 100644
> > --- a/drivers/gpu/drm/msm/msm_gem.c
> > +++ b/drivers/gpu/drm/msm/msm_gem.c
> > @@ -812,17 +812,15 @@ int msm_gem_sync_object(struct drm_gem_object *obj,
> > struct dma_fence *fence;
> > int i, ret;
> >
> > - fobj = dma_resv_shared_list(obj->resv);
> > - if (!fobj || (fobj->shared_count == 0)) {
> > - fence = dma_resv_excl_fence(obj->resv);
> > - /* don't need to wait on our own fences, since ring is fifo */
> > - if (fence && (fence->context != fctx->context)) {
> > - ret = dma_fence_wait(fence, true);
> > - if (ret)
> > - return ret;
> > - }
> > + fence = dma_resv_excl_fence(obj->resv);
> > + /* don't need to wait on our own fences, since ring is fifo */
> > + if (fence && (fence->context != fctx->context)) {
> > + ret = dma_fence_wait(fence, true);
> > + if (ret)
> > + return ret;
> > }
> >
> > + fobj = dma_resv_shared_list(obj->resv);
> > if (!exclusive || !fobj)
> > return 0;
> >
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
More information about the Intel-gfx
mailing list