[Intel-gfx] [PATCH v3 22/30] drm/i915/dg2: Define MOCS table for DG2
Matt Atwood
matthew.s.atwood at intel.com
Thu Jul 29 15:14:20 UTC 2021
On Fri, Jul 23, 2021 at 10:42:31AM -0700, Matt Roper wrote:
> Bspec: 45101, 45427
> Cc: Ramalingam C <ramalingam.c at intel.com>(v5)
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 35 +++++++++++++++++++++++++++-
> 1 file changed, 34 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 0c9d0b936c20..d22ca8212092 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -341,6 +341,30 @@ static const struct drm_i915_mocs_entry xehpsdv_mocs_table[] = {
> MOCS_ENTRY(63, 0, L3_1_UC),
> };
>
> +static const struct drm_i915_mocs_entry dg2_mocs_table[] = {
> + /* UC - Coherent; GO:L3 */
> + MOCS_ENTRY(0, 0, L3_1_UC | L3_LKUP(1)),
> + /* UC - Coherent; GO:Memory */
> + MOCS_ENTRY(1, 0, L3_1_UC | L3_GLBGO(1) | L3_LKUP(1)),
> + /* UC - Non-Coherent; GO:Memory */
> + MOCS_ENTRY(2, 0, L3_1_UC | L3_GLBGO(1)),
> +
> + /* WB - LC */
> + MOCS_ENTRY(3, 0, L3_3_WB | L3_LKUP(1)),
> +};
> +
> +static const struct drm_i915_mocs_entry dg2_mocs_table_g10_ax[] = {
> + /* Wa_14011441408: Set Go to Memory for MOCS#0 */
> + MOCS_ENTRY(0, 0, L3_1_UC | L3_GLBGO(1) | L3_LKUP(1)),
> + /* UC - Coherent; GO:Memory */
> + MOCS_ENTRY(1, 0, L3_1_UC | L3_GLBGO(1) | L3_LKUP(1)),
> + /* UC - Non-Coherent; GO:Memory */
> + MOCS_ENTRY(2, 0, L3_1_UC | L3_GLBGO(1)),
> +
> + /* WB - LC */
> + MOCS_ENTRY(3, 0, L3_3_WB | L3_LKUP(1)),
> +};
> +
> enum {
> HAS_GLOBAL_MOCS = BIT(0),
> HAS_ENGINE_MOCS = BIT(1),
> @@ -367,7 +391,16 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915,
> {
> unsigned int flags;
>
> - if (IS_XEHPSDV(i915)) {
> + if (IS_DG2(i915)) {
> + if (IS_DG2_GT_STEP(i915, G10, STEP_A0, (STEP_B0 - 1))) {
> + table->size = ARRAY_SIZE(dg2_mocs_table_g10_ax);
> + table->table = dg2_mocs_table_g10_ax;
> + } else {
> + table->size = ARRAY_SIZE(dg2_mocs_table);
> + table->table = dg2_mocs_table;
> + }
> + table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> + } else if (IS_XEHPSDV(i915)) {
> table->size = ARRAY_SIZE(xehpsdv_mocs_table);
> table->table = xehpsdv_mocs_table;
> table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> --
> 2.25.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
More information about the Intel-gfx
mailing list