[Intel-gfx] [PATCH v2 8/9] drm/i915/gt: Pipelined clear

[Matthew Auld]

On 09/06/2021 07:34, Thomas Hellström wrote:
> From: Chris Wilson <chris at chris-wilson.co.uk>
> 
> Update the PTE and emit a clear within a single unpreemptible packet
> such that we can schedule and pipeline clears.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Co-developed-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
> Signed-off-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_migrate.c    | 141 ++++++++++++++++++
>   drivers/gpu/drm/i915/gt/intel_migrate.h    |  20 +++
>   drivers/gpu/drm/i915/gt/selftest_migrate.c | 163 +++++++++++++++++++++
>   3 files changed, 324 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 70776316863d..fda05ce3eb9c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -490,6 +490,112 @@ intel_context_migrate_copy(struct intel_context *ce,
>   	return err;
>   }
>   
> +static int emit_clear(struct i915_request *rq, int size, u32 value)
> +{
> +	const int gen = INTEL_GEN(rq->engine->i915);
> +	u32 *cs;
> +
> +	GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
> +
> +	cs = intel_ring_begin(rq, gen >= 8 ? 8 : 6);
> +	if (IS_ERR(cs))
> +		return PTR_ERR(cs);
> +
> +	if (gen >= 8) {
> +		*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
> +		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
> +		*cs++ = 0;
> +		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
> +		*cs++ = 0; /* offset */
> +		*cs++ = 0;

Missing feeding the engine instance into the upper dword for the offset?

> +		*cs++ = value;
> +		*cs++ = MI_NOOP;
> +	} else {
> +		*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (6 - 2);
> +		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
> +		*cs++ = 0;
> +		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
> +		*cs++ = 0;
> +		*cs++ = value;
> +	}
> +
> +	intel_ring_advance(rq, cs);
> +	return 0;
> +}
> +