[Intel-gfx] [PATCH 5/9] drm/i915/fbc: Handle 16bpp compression limit better

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

The limit++ for the 16bpp case is nonsense since the
compression limit is always supposed to be power of two.
Replace it with <<=1.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 55bc708e8712..1c220cea8977 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -239,11 +239,10 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)
 
 	dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane);
 	if (params->fb.format->cpp[0] == 2)
-		limit++;
+		limit <<= 1;
 
 	switch (limit) {
 	case 4:
-	case 3:
 		dpfc_ctl |= DPFC_CTL_LIMIT_4X;
 		break;
 	case 2:
@@ -319,11 +318,10 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
 		dpfc_ctl |= IVB_DPFC_CTL_PLANE(params->crtc.i9xx_plane);
 
 	if (params->fb.format->cpp[0] == 2)
-		limit++;
+		limit <<= 1;
 
 	switch (limit) {
 	case 4:
-	case 3:
 		dpfc_ctl |= DPFC_CTL_LIMIT_4X;
 		break;
 	case 2:
-- 
2.31.1