[Intel-gfx] [PATCH V2] drm/i915/ehl: Update MOCS table for EHL

[Lucas De Marchi]

On Mon, Jun 21, 2021 at 06:26:22PM +0530, Tejas Upadhyay wrote:
>From: Matt Roper <matthew.d.roper at intel.com>
>
>These extra EHL entries were not behaving as expected without proper
>flushing implemented in kernel.
>Commit a679f58d0510 ("drm/i915: Flush pages on acquisition")
>introduces proper flushing to make it work as expected.
>
>Hence adding those EHL entries back.
>
>Changes since V1:
>	- commit message modified with Commit - Joonas
>
>Cc: Francisco Jerez <francisco.jerez.plata at intel.com>
>Cc: Jon Bloomfield <jon.bloomfield at intel.com>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: <stable at vger.kernel.org>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>Fixes: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EHL"")

This story here is weird as we reverted something going to
v5.4 due to something missing, but that something was already in the
tree since v5.1. So it seems the revert shouldn't had been done in the
first place? What am I reading wrong here?

For any gt/gem patches, we need to Cc dri-devel, done now.

Also, it seems your client is suppressing the Cc you added in the body,
so you are actually not sending anything to stable, or to the people
added there.


>Link: https://patchwork.freedesktop.org/patch/msgid/20191112224757.25116-1-matthew.d.roper@intel.com
>---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
>index 17848807f111..7d9ef0210805 100644
>--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
>+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
>@@ -194,6 +194,14 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
> 	MOCS_ENTRY(15, \
> 		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(2) | LE_AOM(1), \
> 		   L3_3_WB), \
>+	/* Bypass LLC - Uncached (EHL+) */ \
>+	MOCS_ENTRY(16, \
>+		   LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
>+		   L3_1_UC), \
>+	/* Bypass LLC - L3 (Read-Only) (EHL+) */ \
>+	MOCS_ENTRY(17, \
>+		   LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
>+		   L3_3_WB), \

For the change itself: it matches bspec 34007.

Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

> 	/* Self-Snoop - L3 + LLC */ \
> 	MOCS_ENTRY(18, \
> 		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3) | LE_SSE(3), \
>-- 
>2.31.1
>
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