[Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

[Nautiyal, Ankit K]

As I realized, this patch is mixing DPCD rev and DP version, need an 
appropriate check instead.

As for the gitlab issue 
https://gitlab.freedesktop.org/drm/intel/-/issues/2868 this seems to be 
not due to a DPCD register not defined for an older sink.

The DPCD read in that case should have been 0, instead of timeout.

I will drop this patch for now, from the series and revisit it later.

Thanks & Regards,

Ankit

On 2/8/2021 5:14 PM, Nautiyal, Ankit K wrote:
>
> On 2/8/2021 4:45 PM, Jani Nikula wrote:
>> On Thu, 04 Feb 2021, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
>>> DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E.
>>> Do not read the registers if DPCD rev < 1.4.
>>>
>>> Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868
>> Please use Fixes: to reference commits that this patch fixes.
>>
>> Please use Closes: to reference issues that this patch fixes.
>>
>> No need to resend for this, can be fixed while applying, but please tell
>> me the commit that introduced the problem.
>>
>> BR,
>> Jani.
>>
> Alright will take care. Please find below the commit that introduced 
> this:
>
> b9d96dacdc3d983eae234b52401edb56dbceb764
>
> Patch : drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder 
> https://patchwork.freedesktop.org/patch/408779/
>
>
> Thanks & Regards,
>
> Ankit
>
>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
>>>   1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
>>> b/drivers/gpu/drm/i915/display/intel_dp.c
>>> index 8c12d5375607..2b83f0f433a2 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>> @@ -2489,9 +2489,11 @@ static void intel_dp_get_pcon_dsc_cap(struct 
>>> intel_dp *intel_dp)
>>>       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>>>         /* Clear the cached register set to avoid using stale values */
>>> -
>>>       memset(intel_dp->pcon_dsc_dpcd, 0, 
>>> sizeof(intel_dp->pcon_dsc_dpcd));
>>>   +    if (intel_dp->dpcd[DP_DPCD_REV] < 0x14)
>>> +        return;
>>> +
>>>       if (drm_dp_dpcd_read(&intel_dp->aux, DP_PCON_DSC_ENCODER,
>>>                    intel_dp->pcon_dsc_dpcd,
>>>                    sizeof(intel_dp->pcon_dsc_dpcd)) < 0)