[Intel-gfx] [PATCH 2/2] drm/i915/dp_link_training: Convert DRM_DEBUG_KMS to drm_dbg_kms

Ville Syrjälä ville.syrjala at linux.intel.com
Thu Mar 11 15:09:22 UTC 2021


On Wed, Mar 10, 2021 at 04:47:57PM -0500, Sean Paul wrote:
> From: Sean Paul <seanpaul at chromium.org>
> 
> One instance of DRM_DEBUG_KMS was leftover in dp_link_training, convert
> it to the new shiny.
> 
> Signed-off-by: Sean Paul <seanpaul at chromium.org>
> ---
>  .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index ad02d493ec16..19ba7c7cbaab 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -26,12 +26,13 @@
>  #include "intel_dp_link_training.h"
>  
>  static void
> -intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
> +intel_dp_dump_link_status(struct drm_device *drm,

I'd generally pass 'i915' rather than the drm_device to
any i915 specific function. But doesn't really matter here since
we just pass is straight through anyway.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> +			  const u8 link_status[DP_LINK_STATUS_SIZE])
>  {
> -
> -	DRM_DEBUG_KMS("ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
> -		      link_status[0], link_status[1], link_status[2],
> -		      link_status[3], link_status[4], link_status[5]);
> +	drm_dbg_kms(drm,
> +		    "ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
> +		    link_status[0], link_status[1], link_status[2],
> +		    link_status[3], link_status[4], link_status[5]);
>  }
>  
>  static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
> @@ -642,7 +643,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>  		/* Make sure clock is still ok */
>  		if (!drm_dp_clock_recovery_ok(link_status,
>  					      crtc_state->lane_count)) {
> -			intel_dp_dump_link_status(link_status);
> +			intel_dp_dump_link_status(&i915->drm, link_status);
>  			drm_dbg_kms(&i915->drm,
>  				    "Clock recovery check failed, cannot "
>  				    "continue channel equalization\n");
> @@ -669,7 +670,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>  
>  	/* Try 5 times, else fail and try at lower BW */
>  	if (tries == 5) {
> -		intel_dp_dump_link_status(link_status);
> +		intel_dp_dump_link_status(&i915->drm, link_status);
>  		drm_dbg_kms(&i915->drm,
>  			    "Channel equalization failed 5 times\n");
>  	}
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel


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