[Intel-gfx] [PATCH 5/6] drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm_level()
Lisovskiy, Stanislav
stanislav.lisovskiy at intel.com
Fri Mar 12 12:25:31 UTC 2021
On Fri, Mar 05, 2021 at 05:36:09PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Make the code more typo proof by extracting small helpers that
> do the "do we have enough DDB for the WM level?" checks in
> a consistent manner.
>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 58 ++++++++++++++++++++-------------
> 1 file changed, 35 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 38a6feced74f..3e26d8b667a1 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4782,6 +4782,36 @@ skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm,
> return &wm->trans_wm;
> }
>
> +/*
> + * We only disable the watermarks for each plane if
> + * they exceed the ddb allocation of said plane. This
> + * is done so that we don't end up touching cursor
> + * watermarks needlessly when some other plane reduces
> + * our max possible watermark level.
> + *
> + * Bspec has this to say about the PLANE_WM enable bit:
> + * "All the watermarks at this level for all enabled
> + * planes must be enabled before the level will be used."
> + * So this is actually safe to do.
> + */
> +static void
> +skl_check_wm_level(struct skl_wm_level *wm, u64 total)
> +{
> + if (wm->min_ddb_alloc > total)
> + memset(wm, 0, sizeof(*wm));
> +}
> +
> +static void
> +skl_check_nv12_wm_level(struct skl_wm_level *wm, struct skl_wm_level *uv_wm,
> + u64 total, u64 uv_total)
> +{
> + if (wm->min_ddb_alloc > total ||
> + uv_wm->min_ddb_alloc > uv_total) {
> + memset(wm, 0, sizeof(*wm));
> + memset(uv_wm, 0, sizeof(*uv_wm));
> + }
> +}
> +
> static int
> skl_allocate_plane_ddb(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> @@ -4949,21 +4979,8 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
> struct skl_plane_wm *wm =
> &crtc_state->wm.skl.optimal.planes[plane_id];
>
> - /*
> - * We only disable the watermarks for each plane if
> - * they exceed the ddb allocation of said plane. This
> - * is done so that we don't end up touching cursor
> - * watermarks needlessly when some other plane reduces
> - * our max possible watermark level.
> - *
> - * Bspec has this to say about the PLANE_WM enable bit:
> - * "All the watermarks at this level for all enabled
> - * planes must be enabled before the level will be used."
> - * So this is actually safe to do.
> - */
> - if (wm->wm[level].min_ddb_alloc > total[plane_id] ||
> - wm->uv_wm[level].min_ddb_alloc > uv_total[plane_id])
> - memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
> + skl_check_nv12_wm_level(&wm->wm[level], &wm->uv_wm[level],
> + total[plane_id], uv_total[plane_id]);
>
> /*
> * Wa_1408961008:icl, ehl
> @@ -4986,14 +5003,9 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
> struct skl_plane_wm *wm =
> &crtc_state->wm.skl.optimal.planes[plane_id];
>
> - if (wm->trans_wm.min_ddb_alloc > total[plane_id])
> - memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
> -
> - if (wm->sagv.wm0.min_ddb_alloc > total[plane_id])
> - memset(&wm->sagv.wm0, 0, sizeof(wm->sagv.wm0));
> -
> - if (wm->sagv.trans_wm.min_ddb_alloc > total[plane_id])
> - memset(&wm->sagv.trans_wm, 0, sizeof(wm->sagv.trans_wm));
> + skl_check_wm_level(&wm->trans_wm, total[plane_id]);
> + skl_check_wm_level(&wm->sagv.wm0, total[plane_id]);
> + skl_check_wm_level(&wm->sagv.trans_wm, total[plane_id]);
> }
>
> return 0;
> --
> 2.26.2
>
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