[Intel-gfx] [PATCH 21/23] drm/i915: Add support for FBs requiring a POT stride alignment
Imre Deak
imre.deak at intel.com
Sat Mar 13 14:36:47 UTC 2021
On Fri, Mar 12, 2021 at 08:02:36PM +0200, Ville Syrjälä wrote:
> [...]
> On Thu, Mar 11, 2021 at 12:17:34AM +0200, Imre Deak wrote:
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index fc02eca45e4d..08b348c9e3e1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -94,6 +94,7 @@ struct intel_framebuffer {
> > struct drm_framebuffer base;
> > struct intel_frontbuffer *frontbuffer;
> > struct intel_rotation_info rot_info;
> > + struct intel_remapped_info rem_info;
> >
> > /* for each plane in the normal GTT view */
> > struct {
> > @@ -101,6 +102,8 @@ struct intel_framebuffer {
> > } normal[4];
> > /* for each plane in the rotated GTT view for no-CCS formats */
> > struct intel_fb_plane_remap_info rotated[2];
> > + /* for each plane in the remapped GTT view. TODO: CCS formats */
> > + struct intel_fb_plane_remap_info remapped[2];
>
> We might want to look into restructuring this a it as a followup.
> Maybe we can collect all the rotation vs. remapping stuff into
> separate sub-structures. Not sure.
Do you mean
struct intel_fb_plane_remap_info {
+ struct intel_remapped_plane_info gtt;
unsigned int x, y;
unsigned int pitch; /* pixels */
};
@@ -93,8 +94,6 @@ struct intel_fb_plane_remap_info {
struct intel_framebuffer {
struct drm_framebuffer base;
struct intel_frontbuffer *frontbuffer;
- struct intel_rotation_info rot_info;
- struct intel_remapped_info rem_info;
/* for each plane in the normal GTT view */
struct {
resulting in
https://github.com/ideak/linux/commit/0fd28d738f9
?
Looks better to me.
> [...]
> > +static unsigned int plane_view_dst_stride(const struct intel_framebuffer *fb, int color_plane,
> > + int pitch_tiles)
> > +{
> > + unsigned int dst_stride;
> > +
> > + if (!intel_fb_needs_pot_stride_remap(fb)) {
> > + dst_stride = pitch_tiles;
> > + } else {
> > + dst_stride = roundup_pow_of_two(pitch_tiles);
> > + drm_WARN_ON(fb->base.dev, dst_stride < pitch_tiles);
>
> Dunno if that WARN is particularly useful. We're talking in tiles here
> so seems extremely unlikely it could overflow.
>
> So I'd probably just make this as simple as possible, like:
> if (needs_pot)
> return roundup(x);
> else
> return x;
Ok, maybe I was thinking of u16, but the overflow for that is checked
later.
I'll also s/int pitch_tiles/unsigned int pitch_tiles/.
> > + };
> > +
> > + return dst_stride;
> > +}
> > +
> [...]
> > @@ -1280,9 +1282,27 @@ rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
> > sg_dma_address(sg) =
> > i915_gem_object_get_dma_address(obj, src_idx);
> > sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
> > +
> > sg = sg_next(sg);
> > - src_idx -= stride;
> > + src_idx -= src_stride;
> > }
> > +
> > + left = (dst_stride - height) * I915_GTT_PAGE_SIZE;
> > +
> > + if (!left)
> > + continue;
> > +
> > + st->nents++;
> > +
> > + /*
> > + * The DE ignores the PTEs for the padding tiles, the sg entry
> > + * here is just a conenience to indicate how many padding PTEs
> > + * to insert at this spot.
> > + */
>
> OK. That certainly makes this nice and simple.
This was only confirmed to be the case on ADL_P, but that's the only
relevant place in any case.
> > + sg_set_page(sg, NULL, left, 0);
> > + sg_dma_address(sg) = 0;
> > + sg_dma_len(sg) = left;
> > + sg = sg_next(sg);
>
> Do we have enough sg entries for these extras? Ah, yeah we allocate
> based on the worst case where each vma page needs its own entry.
Yes, and then i915_sg_trim() compacts it.
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> > }
> >
> > return sg;
More information about the Intel-gfx
mailing list