[Intel-gfx] [PATCH v2 00/50] Introduce Alder Lake-P

[Matt Roper]

The previous version of this series was here:
        https://lists.freedesktop.org/archives/intel-gfx/2021-March/262168.html

The preparation patches that convert display/ to use DISPLAY_VER()
instead of INTEL_GEN() have landed on drm-tip now, so this is mostly
just a straightforward rebase of the remaining patches.  I think there
was only one minor functional fix to the last patch of the series (PSR
changes).

Cc: Clinton Taylor <clinton.a.taylor at intel.com>
Cc: Lucas De Marchi <lucas.demarchi at intel.com>

Animesh Manna (3):
  drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner
  drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed
    bigjoiner
  drm/i915/bigjoiner: atomic commit changes for uncompressed joiner

Anusha Srivatsa (7):
  drm/i915/adl_p: Load DMC
  drm/i915/adl_p: Setup ports/phys
  drm/i915/adl_p: Add cdclk support for ADL-P
  drm/i915/adl_p: Add initial ADL_P Workarounds
  drm/i915/adl_p: Add PLL Support
  drm/i915/adlp: Add PIPE_MISC2 programming
  drm/i915/adl_p: Update memory bandwidth parameters

Clint Taylor (1):
  drm/i915/adlp: Define GuC/HuC for Alderlake_P

Clinton Taylor (3):
  drm/i915/adl_p: Add PCI Devices IDs
  drm/i915/adl_p: ADL_P device info enabling
  drm/i915/adl_p: Add PCH support

José Roberto de Souza (9):
  drm/i915/display/tc: Rename safe_mode functions ownership
  drm/i915/adl_p: Handle TC cold
  drm/i915/adl_p: Implement TC sequences
  drm/i915/adl_p: Enable modular fia
  drm/i915/adl_p: Don't config MBUS and DBUF during display
    initialization
  drm/i915/adl_p: Implement Wa_22011091694
  drm/i915/display/adl_p: Implement Wa_22011320316
  drm/i915/display/adl_p: Remove CCS support
  drm/i915/display/adl_p: Implement PSR changes

Juha-Pekka Heikkilä (1):
  drm/i915/xelpd: Support 128k plane stride

Manasi Navare (1):
  drm/i915/xelpd: Add VRR guardband for VRR CTL

Matt Roper (11):
  drm/i915/xelpd: add XE_LPD display characteristics
  drm/i915/xelpd: Handle proper AUX interrupt bits
  drm/i915/xelpd: Enhanced pipe underrun reporting
  drm/i915/xelpd: Define plane capabilities
  drm/i915/xelpd: Handle new location of outputs D and E
  drm/i915/xelpd: Add XE_LPD power wells
  drm/i915/xelpd: Increase maximum watermark lines to 255
  drm/i915/xelpd: Required bandwidth increases when VT-d is active
  drm/i915/xelpd: Add Wa_14011503030
  drm/i915/adl_p: Add dedicated SAGV watermarks
  drm/i915/adl_p: Extend PLANE_WM bits for blocks & lines

Mika Kahola (3):
  drm/i915/adl_p: Tx escape clock with DSI
  drm/i915/adl_p: Define and use ADL-P specific DP translation tables
  drm/i915/adl_p: Enable/disable loadgen sharing

Uma Shankar (1):
  drm/i915/xelpd: Handle LPSP for XE_LPD

Umesh Nerlige Ramappa (1):
  drm/i915/perf: Enable OA formats for ADL_P

Vandita Kulkarni (7):
  drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp
  drm/i915/xelpd: Support DP1.4 compression BPPs
  drm/i915: Get slice height before computing rc params
  drm/i915/xelpd: Calculate VDSC RC parameters
  drm/i915/xelpd: Add rc_qp_table for rcparams calculation
  drm/i915/adl_p: Add ddb allocation support
  drm/i915/adl_p: MBUS programming

Ville Syrjälä (2):
  drm/i915: Introduce MBUS relative dbuf offsets
  drm/i915: Move intel_modeset_all_pipes()

 arch/x86/kernel/early-quirks.c                |   1 +
 drivers/gpu/drm/i915/display/icl_dsi.c        |  21 +-
 drivers/gpu/drm/i915/display/intel_atomic.c   |  20 +
 drivers/gpu/drm/i915/display/intel_atomic.h   |   1 +
 drivers/gpu/drm/i915/display/intel_bios.c     |  10 +-
 drivers/gpu/drm/i915/display/intel_bw.c       |   5 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  86 ++--
 drivers/gpu/drm/i915/display/intel_csr.c      |  10 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  40 +-
 .../drm/i915/display/intel_ddi_buf_trans.c    |  34 ++
 .../drm/i915/display/intel_ddi_buf_trans.h    |   4 +
 drivers/gpu/drm/i915/display/intel_display.c  | 127 ++++-
 drivers/gpu/drm/i915/display/intel_display.h  |   9 +
 .../drm/i915/display/intel_display_debugfs.c  |   6 +
 .../drm/i915/display/intel_display_power.c    | 455 +++++++++++++++++-
 .../drm/i915/display/intel_display_power.h    |  11 +
 .../drm/i915/display/intel_display_types.h    |   2 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  75 ++-
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |  14 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  71 ++-
 .../drm/i915/display/intel_fifo_underrun.c    |  65 ++-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   2 +-
 drivers/gpu/drm/i915/display/intel_psr.c      |  53 +-
 .../gpu/drm/i915/display/intel_qp_tables.c    | 272 +++++++++++
 .../gpu/drm/i915/display/intel_qp_tables.h    |  34 ++
 drivers/gpu/drm/i915/display/intel_tc.c       | 159 +++++-
 drivers/gpu/drm/i915/display/intel_vdsc.c     | 160 +++++-
 drivers/gpu/drm/i915/display/intel_vdsc.h     |   2 +
 drivers/gpu/drm/i915/display/intel_vrr.c      |  56 ++-
 .../drm/i915/display/skl_universal_plane.c    |  77 ++-
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c      |   4 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  59 ++-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c      |   1 +
 drivers/gpu/drm/i915/i915_drv.h               |  13 +
 drivers/gpu/drm/i915/i915_irq.c               |  28 +-
 drivers/gpu/drm/i915/i915_pci.c               |  23 +
 drivers/gpu/drm/i915/i915_perf.c              |   1 +
 drivers/gpu/drm/i915/i915_reg.h               | 204 ++++++--
 drivers/gpu/drm/i915/intel_device_info.c      |   3 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   1 +
 drivers/gpu/drm/i915/intel_pch.c              |   6 +-
 drivers/gpu/drm/i915/intel_pch.h              |   1 +
 drivers/gpu/drm/i915/intel_pm.c               | 341 ++++++++++++-
 drivers/gpu/drm/i915/intel_pm.h               |   2 +-
 include/drm/i915_pciids.h                     |  21 +
 45 files changed, 2292 insertions(+), 298 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.h

-- 
2.25.4