[Intel-gfx] [PATCH v2 20/25] drm/i915: Shrink the size of intel_remapped_plane_info struct

[Imre Deak]

Save some place in the GTT VMAs by using a u16 instead of unsigned int
to store the view dimensions. The maximum FB stride is 256kB which is
4096 tiles in the worst case (yf-tiles), the maximum FB height is 16k
pixels, which is 16384 tiles in the worst case (linear 4x1 tiled FB).

v2:
- Fix worst case tile height formula in commit log. (Ville)
- Add an assign_chk_ovf helper to simplify the related assignments.

Signed-off-by: Imre Deak <imre.deak at intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb.c | 15 +++++++++++----
 drivers/gpu/drm/i915/i915_vma_types.h   | 12 ++++++++----
 2 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index b56c432e0415f..e153f6ae1298c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -613,6 +613,11 @@ plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
 	return DIV_ROUND_UP(y + dims->height, dims->tile_height);
 }
 
+#define assign_chk_ovf(i915, var, val) ({ \
+	drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+	var = val; \
+})
+
 static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_plane,
 				 const struct fb_plane_view_dims *dims,
 				 u32 obj_offset, u32 gtt_offset, int x, int y,
@@ -627,10 +632,10 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
 	unsigned int pitch_tiles;
 	struct drm_rect r;
 
-	remap_info->offset = obj_offset;
-	remap_info->stride = plane_view_stride_tiles(fb, color_plane, dims);
-	remap_info->width = plane_view_width_tiles(fb, color_plane, dims, x);
-	remap_info->height = plane_view_height_tiles(fb, color_plane, dims, y);
+	assign_chk_ovf(i915, remap_info->offset, obj_offset);
+	assign_chk_ovf(i915, remap_info->stride, plane_view_stride_tiles(fb, color_plane, dims));
+	assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
+	assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
 
 	if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
 		check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
@@ -676,6 +681,8 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
 	return remap_info->width * remap_info->height;
 }
 
+#undef assign_chk_ovf
+
 /* Return number of tiles @color_plane needs. */
 static unsigned int
 calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index f5cb848b7a7eb..358b4306fc002 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -97,12 +97,16 @@ enum i915_cache_level;
 
 struct intel_remapped_plane_info {
 	/* in gtt pages */
-	unsigned int width, height, stride, offset;
+	u32 offset;
+	u16 width;
+	u16 height;
+	u16 stride;
+	u16 unused_mbz;
 } __packed;
 
 struct intel_remapped_info {
 	struct intel_remapped_plane_info plane[2];
-	unsigned int unused_mbz;
+	u32 unused_mbz;
 } __packed;
 
 struct intel_rotation_info {
@@ -123,9 +127,9 @@ enum i915_ggtt_view_type {
 
 static inline void assert_i915_gem_gtt_types(void)
 {
-	BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 8*sizeof(unsigned int));
+	BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
 	BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
-	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 9*sizeof(unsigned int));
+	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 3 * sizeof(u32) + 8 * sizeof(u16));
 
 	/* Check that rotation/remapped shares offsets for simplicity */
 	BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
-- 
2.25.1