[Intel-gfx] [PATCH] drm/i915/tgl+: Add the missing MC CCS/XYUV8888 format support

[Juha-Pekka Heikkila]

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>

On 1.5.2021 3.28, Imre Deak wrote:
> Make sure that the XYUV8888 format is handled correctly when it's used
> with a MC_CCS modifier framebuffer. Besides this format not working, the
> driver will also return an incorrect error value when trying to use it,
> indicating that the second color plane in the framebuffer is set
> unexpectedly.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6280ba7f4c172..13ed9055918fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1263,6 +1263,9 @@ static const struct drm_format_info gen12_ccs_formats[] = {
>   	{ .format = DRM_FORMAT_VYUY, .num_planes = 2,
>   	  .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
>   	  .hsub = 2, .vsub = 1, .is_yuv = true },
> +	{ .format = DRM_FORMAT_XYUV8888, .num_planes = 2,
> +	  .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
> +	  .hsub = 1, .vsub = 1, .is_yuv = true },
>   	{ .format = DRM_FORMAT_NV12, .num_planes = 4,
>   	  .char_per_block = { 1, 2, 1, 1 }, .block_w = { 1, 1, 4, 4 }, .block_h = { 1, 1, 1, 1 },
>   	  .hsub = 2, .vsub = 2, .is_yuv = true },
>