[Intel-gfx] [PATCH] drm/i915: Use correct downstream caps for check Src-Ctl mode for PCON

[Nautiyal, Ankit K]

On 5/3/2021 11:03 PM, Jani Nikula wrote:
> On Thu, 29 Apr 2021, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
>> Fix the typo in DPCD caps used for checking SRC CTL mode of
>> HDMI2.1 PCON
>>
>> Fixes: 04b6603d13be (drm/i915/display: Configure HDMI2.1 Pcon for FRL
>> only if Src-Ctl mode is available)
> Correct format for Fixes: is this:
>
> Fixes: 04b6603d13be ("drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is available")
>
> You'll get it with 'dim fixes <sha1>', along with some suggested Cc's.
>
> BR,
> Jani.


Thanks Jani for pointing this out. I Will use dim fixes as suggested and 
send updated version.

Regards,

Ankit

>
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index dfa7da928ae5..b3e82aa8b4f8 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -2112,7 +2112,7 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
>>   	 * -PCON supports SRC_CTL_MODE (VESA DP2.0-HDMI2.1 PCON Spec Draft-1 Sec-7)
>>   	 * -sink is HDMI2.1
>>   	 */
>> -	if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) ||
>> +	if (!(intel_dp->downstream_ports[2] & DP_PCON_SOURCE_CTL_MODE) ||
>>   	    !intel_dp_is_hdmi_2_1_sink(intel_dp) ||
>>   	    intel_dp->frl.is_trained)
>>   		return;