[Intel-gfx] [PATCH v2 10/10] drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT

Imre Deak imre.deak at intel.com
Thu May 6 16:19:30 UTC 2021


Enable padding of DPT FB strides to POT, using the FB remapping logic.

Signed-off-by: Imre Deak <imre.deak at intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++++++----
 drivers/gpu/drm/i915/display/intel_fb.c      |  7 +++++--
 drivers/gpu/drm/i915/display/intel_fb.h      |  1 +
 3 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 70ac197746b1f..ff0cfdf1a90ee 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -231,16 +231,22 @@ static void dpt_cleanup(struct i915_address_space *vm)
 }
 
 static struct i915_address_space *
-intel_dpt_create(struct drm_gem_object *obj)
+intel_dpt_create(struct intel_framebuffer *fb)
 {
+	struct drm_gem_object *obj = &intel_fb_obj(&fb->base)->base;
 	struct drm_i915_private *i915 = to_i915(obj->dev);
-	size_t size = DIV_ROUND_UP_ULL(obj->size, 512);
 	struct drm_i915_gem_object *dpt_obj;
 	struct i915_address_space *vm;
 	struct i915_dpt *dpt;
+	size_t size;
 	int ret;
 
-	size = round_up(size, 4096);
+	if (intel_fb_needs_pot_stride_remap(fb))
+		size = intel_remapped_info_size(&fb->remapped_view.gtt.remapped);
+	else
+		size = DIV_ROUND_UP_ULL(obj->size, I915_GTT_PAGE_SIZE);
+
+	size = round_up(size * sizeof(gen8_pte_t), I915_GTT_PAGE_SIZE);
 
 	if (HAS_LMEM(i915))
 		dpt_obj = i915_gem_object_create_lmem(i915, size, 0);
@@ -11566,8 +11572,10 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 			}
 		}
 
+		/* TODO: Add POT stride remapping support for CCS formats as well. */
 		if (IS_ALDERLAKE_P(dev_priv) &&
 		    mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
+		    !intel_fb_needs_pot_stride_remap(intel_fb) &&
 		    !is_power_of_2(mode_cmd->pitches[i])) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "plane %d pitch (%d) must be power of two for tiled buffers\n",
@@ -11585,7 +11593,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 	if (intel_fb_uses_dpt(fb)) {
 		struct i915_address_space *vm;
 
-		vm = intel_dpt_create(&obj->base);
+		vm = intel_dpt_create(intel_fb);
 		if (IS_ERR(vm)) {
 			ret = PTR_ERR(vm);
 			goto err;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 29c558fbb397a..a005c68889e7c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -478,9 +478,12 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
 	return true;
 }
 
-static bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
+bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
 {
-	return false;
+	struct drm_i915_private *i915 = to_i915(fb->base.dev);
+
+	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
+	       !is_ccs_modifier(fb->base.modifier);
 }
 
 static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index d77d9f914cf4c..739d1b91754bd 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -45,6 +45,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
 				       const struct intel_plane_state *state,
 				       int color_plane);
 
+bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb);
 bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb);
 
 int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb);
-- 
2.27.0



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