[Intel-gfx] [PATCH 11/17] drm/i915: Introduce rkl_get_combo_buf_trans()

Jani Nikula jani.nikula at linux.intel.com
Wed May 12 18:58:51 UTC 2021


On Wed, 21 Apr 2021, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Give RKL its own get_buf_trans() func.
>
> Note that the spec currently only lists values for DP.
> Until we get that clarified let's just assume that for
> HDMI and eDP we should do what TGL does (except we fall
> back to the RKL DP values instead of TGL DP values when
> not using the eDP specific values, whereas previously
> we used all TGL values for eDP).
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  .../drm/i915/display/intel_ddi_buf_trans.c    | 65 +++++++++++++++----
>  1 file changed, 53 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index 1d78640c439e..fd55c812f14a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1458,10 +1458,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  
>  	if (crtc_state->port_clock > 270000) {
> -		if (IS_ROCKETLAKE(dev_priv)) {
> -			return intel_get_buf_trans(&rkl_combo_phy_ddi_translations_dp_hbr2_hbr3,
> -						   n_entries);
> -		} else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> +		if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>  			return intel_get_buf_trans(&tgl_uy_combo_phy_ddi_translations_dp_hbr2,
>  						   n_entries);
>  		} else {
> @@ -1469,13 +1466,8 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
>  						   n_entries);
>  		}
>  	} else {
> -		if (IS_ROCKETLAKE(dev_priv)) {
> -			return intel_get_buf_trans(&rkl_combo_phy_ddi_translations_dp_hbr,
> -						   n_entries);
> -		} else {
> -			return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_dp_hbr,
> -						   n_entries);
> -		}
> +		return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_dp_hbr,
> +					   n_entries);
>  	}
>  }
>  
> @@ -1514,6 +1506,53 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder,
>  		return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
>  }
>  
> +static const struct intel_ddi_buf_trans *
> +rkl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
> +			   const struct intel_crtc_state *crtc_state,
> +			   int *n_entries)
> +{
> +	if (crtc_state->port_clock > 270000)
> +		return intel_get_buf_trans(&rkl_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries);
> +	else
> +		return intel_get_buf_trans(&rkl_combo_phy_ddi_translations_dp_hbr, n_entries);
> +}
> +
> +static const struct intel_ddi_buf_trans *
> +rkl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
> +			    const struct intel_crtc_state *crtc_state,
> +			    int *n_entries)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> +	if (crtc_state->port_clock > 540000) {
> +		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3,
> +					   n_entries);
> +	} else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) {
> +		return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl,
> +					   n_entries);
> +	} else if (dev_priv->vbt.edp.low_vswing) {
> +		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
> +					   n_entries);
> +	}
> +
> +	return rkl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> +}
> +
> +static const struct intel_ddi_buf_trans *
> +rkl_get_combo_buf_trans(struct intel_encoder *encoder,
> +			const struct intel_crtc_state *crtc_state,
> +			int *n_entries)
> +{
> +	/* FIXME unclear what values we should use for HDMI and eDP */
> +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> +		return tgl_get_combo_buf_trans_hdmi(encoder, crtc_state, n_entries);
> +	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> +		return rkl_get_combo_buf_trans_edp(encoder, crtc_state, n_entries);
> +	else
> +		return rkl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> +}
> +
>  static const struct intel_ddi_buf_trans *
>  tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder,
>  			   const struct intel_crtc_state *crtc_state,
> @@ -1573,7 +1612,9 @@ void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>  	enum phy phy = intel_port_to_phy(i915, encoder->port);
>  
> -	if (DISPLAY_VER(i915) >= 12) {
> +	if (IS_ROCKETLAKE(i915)) {
> +		encoder->get_buf_trans = rkl_get_combo_buf_trans;
> +	} else if (DISPLAY_VER(i915) >= 12) {
>  		if (intel_phy_is_combo(i915, phy))
>  			encoder->get_buf_trans = tgl_get_combo_buf_trans;
>  		else

-- 
Jani Nikula, Intel Open Source Graphics Center


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