[Intel-gfx] [PATCH v2 05/15] drm/i915/ttm Initialize the ttm device and memory managers
Matthew Auld
matthew.william.auld at gmail.com
Tue May 18 09:05:13 UTC 2021
On Tue, 18 May 2021 at 09:27, Thomas Hellström
<thomas.hellstrom at linux.intel.com> wrote:
>
> Temporarily remove the buddy allocator and related selftests
> and hook up the TTM range manager for i915 regions.
>
> Also modify the mock region selftests somewhat to account for a
> fragmenting manager.
>
> Signed-off-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
> ---
> v2:
> - Fix an error unwind in lmem_get_pages() (Reported by Matthew Auld)
> - Break out and modify usage of i915_sg_dma_sizes() (Reported by Mattew Auld)
> - Break out TTM changes to a separate patch (Reported by Christian König)
> ---
<snip>
>
> +/**
> + * i915_sg_from_mm_node - Create an sg_table from a struct drm_mm_node
> + * @node: The drm_mm_node.
> + * @region_start: An offset to add to the dma addresses of the sg list.
> + *
> + * Create a struct sg_table, initializing it from a struct drm_mm_node,
> + * taking a maximum segment length into account, splitting into segments
> + * if necessary.
> + *
> + * Return: A pointer to a kmalloced struct sg_table on success, negative
> + * error code cast to an error pointer on failure.
> + */
> +struct sg_table *i915_sg_from_mm_node(const struct drm_mm_node *node,
> + u64 region_start)
> +{
> + const u64 max_segment = SZ_1G; /* Do we have a limit on this? */
For lmem just INT_MAX I think, which is the limit of the sg, but
really doesn't matter for now, this should be totally fine for now.
Assuming CI is happy,
Reviewed-by: Matthew Auld <matthew.auld at intel.com>
Also we could maybe fling this series with the HAX autoprobing patch
for DG1 at trybot, just to see where we are?
More information about the Intel-gfx
mailing list