[Intel-gfx] [Linaro-mm-sig] [PATCH 04/11] drm/panfrost: Fix implicit sync

[Christian König]

Am 21.05.21 um 14:22 schrieb Daniel Stone:
> Hi,
>
> On Fri, 21 May 2021 at 10:10, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
>> Currently this has no practial relevance I think because there's not
>> many who can pull off a setup with panfrost and another gpu in the
>> same system. But the rules are that if you're setting an exclusive
>> fence, indicating a gpu write access in the implicit fencing system,
>> then you need to wait for all fences, not just the previous exclusive
>> fence.
>>
>> panfrost against itself has no problem, because it always sets the
>> exclusive fence (but that's probably something that will need to be
>> fixed for vulkan and/or multi-engine gpus, or you'll suffer badly).
>> Also no problem with that against display.
> Yeah, the 'second-generation Valhall' GPUs coming later this year /
> early next year are starting to get pretty weird. Firmware-mediated
> job scheduling out of multiple queues, userspace having direct access
> to the queues and can do inter-queue synchronisation (at least I think
> so), etc. For bonus points, synchronisation is based on $addr = $val
> to signal and $addr == $val to wait, with a separate fence primitive
> as well.

Well that sounds familiar :)

> Obviously Arm should be part of this conversation here, but I guess
> we'll have to wait for a while yet to see how everything's shaken out
> with this new gen, and hope that whatever's been designed upstream in
> the meantime is actually vaguely compatible ...

Yeah, going to keep you in CC when we start to code and review user fences.

Cheers,
Christian.

>
> Cheers,
> Daniel
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