[Intel-gfx] i915 gvt broke drm-tip; Fix ASAP

Thomas Zimmermann tzimmermann at suse.de
Sat May 22 19:19:38 UTC 2021


Hi,

after creating drm-tip today as part of [1], building drm-tip is now 
broken with the error message shown below.

Some register constants appear to be missing from the GVT code. Please 
fix ASAP.

Best regards
Thomas

tzimmermann at linux-uq9g:~/Projekte/linux> LANG= make -j8 W=1 O=build-x86_64/

make[1]: Entering directory '/home/tzimmermann/Projekte/linux/build-x86_64'

   GEN     Makefile

   DESCEND  objtool

   CALL    ../scripts/atomic/check-atomics.sh

   CALL    ../scripts/checksyscalls.sh

   CHK     include/generated/compile.h

   CC [M]  drivers/gpu/drm/via/via_irq.o

   CC [M]  drivers/gpu/drm/via/via_drv.o

   CC [M]  drivers/gpu/drm/i915/gvt/handlers.o

   CC [M]  drivers/gpu/drm/via/via_map.o

   CC [M]  drivers/gpu/drm/vgem/vgem_drv.o

../drivers/gpu/drm/i915/gvt/handlers.c: In function 'init_skl_mmio_info':

../drivers/gpu/drm/i915/gvt/handlers.c:3345:9: error: 'CSR_SSP_BASE' 
undeclared (first use in this function); did you mean 'MSR_FS_BASE'?

  3345 |  MMIO_D(CSR_SSP_BASE, D_SKL_PLUS);

       |         ^~~~~~~~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:2120:48: note: in definition of 
macro 'MMIO_F'

  2120 |  ret = new_mmio_info(gvt, i915_mmio_reg_offset(reg), \

       |                                                ^~~

../drivers/gpu/drm/i915/gvt/handlers.c:3345:2: note: in expansion of 
macro 'MMIO_D'

  3345 |  MMIO_D(CSR_SSP_BASE, D_SKL_PLUS);

       |  ^~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:3345:9: note: each undeclared 
identifier is reported only once for each function it appears in

  3345 |  MMIO_D(CSR_SSP_BASE, D_SKL_PLUS);

       |         ^~~~~~~~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:2120:48: note: in definition of 
macro 'MMIO_F'

  2120 |  ret = new_mmio_info(gvt, i915_mmio_reg_offset(reg), \

       |                                                ^~~

../drivers/gpu/drm/i915/gvt/handlers.c:3345:2: note: in expansion of 
macro 'MMIO_D'

  3345 |  MMIO_D(CSR_SSP_BASE, D_SKL_PLUS);

       |  ^~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:3346:9: error: 'CSR_HTP_SKL' 
undeclared (first use in this function); did you mean 'DMC_HTP_SKL'?

  3346 |  MMIO_D(CSR_HTP_SKL, D_SKL_PLUS);

       |         ^~~~~~~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:2120:48: note: in definition of 
macro 'MMIO_F'

  2120 |  ret = new_mmio_info(gvt, i915_mmio_reg_offset(reg), \

       |                                                ^~~

../drivers/gpu/drm/i915/gvt/handlers.c:3346:2: note: in expansion of 
macro 'MMIO_D'

  3346 |  MMIO_D(CSR_HTP_SKL, D_SKL_PLUS);

       |  ^~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:3347:9: error: 'CSR_LAST_WRITE' 
undeclared (first use in this function); did you mean 'DMC_LAST_WRITE'?

  3347 |  MMIO_D(CSR_LAST_WRITE, D_SKL_PLUS);

       |         ^~~~~~~~~~~~~~

../drivers/gpu/drm/i915/gvt/handlers.c:2120:48: note: in definition of 
macro 'MMIO_F'

  2120 |  ret = new_mmio_info(gvt, i915_mmio_reg_offset(reg), \

       |                                                ^~~

../drivers/gpu/drm/i915/gvt/handlers.c:3347:2: note: in expansion of 
macro 'MMIO_D'

  3347 |  MMIO_D(CSR_LAST_WRITE, D_SKL_PLUS);

       |  ^~~~~~

   CC [M]  drivers/gpu/drm/via/via_mm.o

   CC [M]  drivers/gpu/drm/via/via_dma.o

In file included from ../drivers/gpu/drm/i915/i915_drv.h:64,

                  from ../drivers/gpu/drm/i915/gvt/handlers.c:39:

../drivers/gpu/drm/i915/gvt/handlers.c: At top level:

../drivers/gpu/drm/i915/gvt/handlers.c:3658:21: error: 
'CSR_MMIO_START_RANGE' undeclared here (not in a function); did you mean 
'DMC_MMIO_START_RANGE'?

  3658 |  {D_SKL_PLUS, _MMIO(CSR_MMIO_START_RANGE), 0x3000, NULL, NULL},

       |                     ^~~~~~~~~~~~~~~~~~~~

../drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro 

'_MMIO'

   185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })

       |                                               ^

make[5]: *** [../scripts/Makefile.build:272: 
drivers/gpu/drm/i915/gvt/handlers.o] Error 1


[1] 
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=304ba5dca49a21e6f4040494c669134787145118

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer

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