[Intel-gfx] [PATCH 5/5] drm/i915/display/adl_p: Disable PSR2

[Souza, Jose]

On Tue, 2021-05-25 at 13:55 +0300, Jani Nikula wrote:
> On Mon, 24 May 2021, José Roberto de Souza <jose.souza at intel.com> wrote:
> > We are missing the implementation of some workarounds to enabled PSR2
> > in Alderlake P, so to avoid any CI report of issues around PSR2
> > disabling it until all PSR2 workarounds are implemented.
> > 
> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> > index c57210862206..46bd77669ead 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -765,6 +765,16 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> >  		return false;
> >  	}
> >  
> > +	/*
> > +	 * We are missing the implementation of some workarounds to enabled PSR2
> > +	 * also Windows team found issues in this stepping that are causing
> > +	 * issues in most PSR2 panels.
> 
> "this stepping"?
> 
> Maybe just say we need to implement certain workarounds before enabling
> PSR2?
> 

Fixed and pushed.

> BR,
> Jani.
> 
> 
> > +	 */
> > +	if (IS_ALDERLAKE_P(dev_priv)) {
> > +		drm_dbg_kms(&dev_priv->drm, "PSR2 is missing the implementation of workarounds\n");
> > +		return false;
> > +	}
> > +
> >  	if (!transcoder_has_psr2(dev_priv, crtc_state->cpu_transcoder)) {
> >  		drm_dbg_kms(&dev_priv->drm,
> >  			    "PSR2 not supported in transcoder %s\n",
>