[Intel-gfx] [PATCH v3 5/5] drm/i915/dg2: extend Wa_1409120013 to DG2

Matt Roper matthew.d.roper at intel.com
Fri Nov 19 17:11:55 UTC 2021


On Fri, Nov 19, 2021 at 08:36:56AM -0800, Souza, Jose wrote:
> On Tue, 2021-11-16 at 09:48 -0800, Matt Roper wrote:
> > From: Matt Atwood <matthew.s.atwood at intel.com>
> > 
> > Extend existing workaround 1409120013 to DG2.
> > 
> > Cc: José Roberto de Souza <jose.souza at intel.com>
> > Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> > Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 89dc7f69baf3..e721c421cc58 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -7444,9 +7444,9 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> >  
> >  static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv)
> >  {
> > -	/* Wa_1409120013:tgl,rkl,adl-s,dg1 */
> > +	/* Wa_1409120013:tgl,rkl,adl-s,dg1,dg2 */
> 
> I'm not finding this workaround in the DG2 WA spec page, maybe it was removed because it is not necessary anymore?

Ville raised the same question; I believe this is just an issue with the
query that generates the bspec page from the database; here's my earlier
response:

        >> This seems to be problem with the DG2 query since for some
        >> reason they marked this workaround as
        >> 'driver_change_required' rather than 'driver_permanent_wa' in
        >> the database and that prevents it from showing up in some of
        >> the queries properly.  The DG2-specific ID number to check is
        >> 1409222275.

Since it appears this is currently needed on every version 12 and
version 13 display platform _except_ for ADL-P, I did send a question to
the HW team to confirm that the lack of ADL-P isn't an oversight, but I
haven't heard back yet.


Matt

> 
> >  	if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv) ||
> > -	    IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv))
> > +	    IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv) || IS_DG2(dev_priv))
> >  		intel_uncore_write(&dev_priv->uncore, ILK_DPFC_CHICKEN,
> >  				   DPFC_CHICKEN_COMP_DUMMY_PIXEL);
> >  
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795


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