[Intel-gfx] [PATCH] drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers

[Ville Syrjälä]

On Fri, Oct 01, 2021 at 01:03:16PM +0300, Jani Nikula wrote:
> For controlling the audio SDP split.
> 
> Bspec: 63837
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3a20a55d2512..0d2d89ea376b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9763,6 +9763,11 @@ enum {
>  #define   AUDIO_CP_READY(trans)		((1 << 1) << ((trans) * 4))
>  #define   AUDIO_ELD_VALID(trans)	((1 << 0) << ((trans) * 4))
>  
> +#define _AUD_TCA_DP_2DOT0_CTRL		0x650bc
> +#define _AUD_TCB_DP_2DOT0_CTRL		0x651bc
> +#define AUD_DP_2DOT0_CTRL(trans)	_MMIO_TRANS(trans, _AUD_TCA_DP_2DOT0_CTRL, _AUD_TCB_DP_2DOT0_CTRL)
> +#define  AUD_ENABLE_SDP_SPLIT		REG_BIT(31)

Don't need the other bits? Most of the do say we don't need to
program then. But the hblank guardband thing looks like maybe
we might need it in some cases?

Either way, what you have here matches my spec so
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> +
>  #define HSW_AUD_CHICKENBIT			_MMIO(0x65f10)
>  #define   SKL_AUD_CODEC_WAKE_SIGNAL		(1 << 15)
>  
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel