[Intel-gfx] [PATCH v2 00/10] drm/i915: DP per-lane drive settings prep work
Ville Syrjala
ville.syrjala at linux.intel.com
Fri Oct 1 13:00:57 UTC 2021
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
Revised set after I fixed the DDI_BUF_CTL stuff Imre
pointed out. Also pushed the first s/ddi_translation/trans/
rename patch already.
There are two new patches at the start of the series to
refactor some platform checks into a more sensible form.
Ville Syrjälä (10):
drm/i915: Introduce has_iboost()
drm/i915: Introduce has_buf_trans_select()
drm/i915: Generalize .set_signal_levels()
drm/i915: Nuke useless .set_signal_levels() wrappers
drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels()
drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()
drm/i915: Nuke intel_ddi_hdmi_num_entries()
drm/i915: Pass the lane to intel_ddi_level()
drm/i915: Prepare link training for per-lane drive settings
drm/i915: Allow per-lane drive settings with LTTPRs
drivers/gpu/drm/i915/display/g4x_dp.c | 33 +--
drivers/gpu/drm/i915/display/intel_ddi.c | 244 ++++++------------
drivers/gpu/drm/i915/display/intel_ddi.h | 7 +-
.../drm/i915/display/intel_ddi_buf_trans.c | 20 --
.../drm/i915/display/intel_ddi_buf_trans.h | 4 -
.../drm/i915/display/intel_display_types.h | 5 +-
.../drm/i915/display/intel_dp_link_training.c | 83 ++++--
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 28 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.h | 5 +-
drivers/gpu/drm/i915/display/intel_snps_phy.c | 9 +-
drivers/gpu/drm/i915/display/intel_snps_phy.h | 5 +-
11 files changed, 196 insertions(+), 247 deletions(-)
--
2.32.0
More information about the Intel-gfx
mailing list