[Intel-gfx] [PATCH v2 3/5] drm/i915: Print the DP vswing adjustment request
Imre Deak
imre.deak at intel.com
Wed Oct 6 15:50:28 UTC 2021
On Mon, Oct 04, 2021 at 08:05:33PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Print out each DP vswing adjustment request we got from the RX.
> Could help in diagnosing what's going on during link training.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Imre Deak <imre.deak at intel.com>
> ---
> .../drm/i915/display/intel_dp_link_training.c | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 6bab097cafd2..5657be1461ec 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -343,14 +343,41 @@ static u8 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp,
> return v | p;
> }
>
> +#define TRAIN_REQ_FMT "%d/%d/%d/%d"
> +#define _TRAIN_REQ_VSWING_ARGS(link_status, lane) \
> + (drm_dp_get_adjust_request_voltage((link_status), (lane)) >> DP_TRAIN_VOLTAGE_SWING_SHIFT)
> +#define TRAIN_REQ_VSWING_ARGS(link_status) \
> + _TRAIN_REQ_VSWING_ARGS(link_status, 0), \
> + _TRAIN_REQ_VSWING_ARGS(link_status, 1), \
> + _TRAIN_REQ_VSWING_ARGS(link_status, 2), \
> + _TRAIN_REQ_VSWING_ARGS(link_status, 3)
> +#define _TRAIN_REQ_PREEMPH_ARGS(link_status, lane) \
> + (drm_dp_get_adjust_request_pre_emphasis((link_status), (lane)) >> DP_TRAIN_PRE_EMPHASIS_SHIFT)
> +#define TRAIN_REQ_PREEMPH_ARGS(link_status) \
> + _TRAIN_REQ_PREEMPH_ARGS(link_status, 0), \
> + _TRAIN_REQ_PREEMPH_ARGS(link_status, 1), \
> + _TRAIN_REQ_PREEMPH_ARGS(link_status, 2), \
> + _TRAIN_REQ_PREEMPH_ARGS(link_status, 3)
> +
> void
> intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state,
> enum drm_dp_phy dp_phy,
> const u8 link_status[DP_LINK_STATUS_SIZE])
> {
> + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> + char phy_name[10];
> int lane;
>
> + drm_dbg_kms(encoder->base.dev, "[ENCODER:%d:%s] lanes: %d, "
> + "vswing request: " TRAIN_REQ_FMT ", "
> + "pre-emphasis request: " TRAIN_REQ_FMT ", at %s\n",
> + encoder->base.base.id, encoder->base.name,
> + crtc_state->lane_count,
> + TRAIN_REQ_VSWING_ARGS(link_status),
> + TRAIN_REQ_PREEMPH_ARGS(link_status),
> + intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)));
> +
> for (lane = 0; lane < 4; lane++)
> intel_dp->train_set[lane] =
> intel_dp_get_lane_adjust_train(intel_dp, crtc_state,
> --
> 2.32.0
>
More information about the Intel-gfx
mailing list