[Intel-gfx] [PATCH 4/4] drm/i915: Rename intel_load_plane_csc_black()

Li, Juston juston.li at intel.com
Thu Oct 7 05:55:39 UTC 2021


On Thu, 2021-10-07 at 02:57 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> intel_load_plane_csc_black() is specific to glk+ so deserves
> a name reflecting that fact. Also rename the variables to
> standard form so I won't get confused reading the code.
> 
> Cc: Anshuman Gupta <anshuman.gupta at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Juston Li <juston.li at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Uma Shankar <uma.shankar at intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Juston Li <juston.li at intel.com>

> ---
>  .../drm/i915/display/skl_universal_plane.c    | 35 +++++++++----------
>  1 file changed, 17 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 1e85ea98231f..709ab7166d88 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1011,29 +1011,28 @@ static u32 skl_surf_address(const struct
> intel_plane_state *plane_state,
>         }
>  }
>  
> -static void intel_load_plane_csc_black(struct intel_plane
> *intel_plane)
> +static void glk_plane_csc_load_black(struct intel_plane *plane)
>  {
> -       struct drm_i915_private *dev_priv = to_i915(intel_plane-
> >base.dev);
> -       enum pipe pipe = intel_plane->pipe;
> -       enum plane_id plane = intel_plane->id;
> -       u16 postoff = 0;
> +       struct drm_i915_private *i915 = to_i915(plane->base.dev);
> +       enum plane_id plane_id = plane->id;
> +       enum pipe pipe = plane->pipe;
>  
> -       intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 0),
> 0);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 1),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 0), 0);
> +       intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 1), 0);
>  
> -       intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 2),
> 0);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 3),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 2), 0);
> +       intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 3), 0);
>  
> -       intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 4),
> 0);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 5),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 4), 0);
> +       intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 5), 0);
>  
> -       intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 0),
> 0);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 1),
> 0);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 2),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 0),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 1),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 2),
> 0);
>  
> -       intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 0),
> postoff);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 1),
> postoff);
> -       intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 2),
> postoff);
> +       intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 0),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 1),
> 0);
> +       intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 2),
> 0);
>  }
>  
>  static void
> @@ -1102,7 +1101,7 @@ skl_program_plane(struct intel_plane *plane,
>          * or after the commit, display content will be garbage.
>          */
>         if (plane_state->force_black)
> -               intel_load_plane_csc_black(plane);
> +               glk_plane_csc_load_black(plane);
>  
>         intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> stride);
>         intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),



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