[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Fix link parameter use in lack of a valid DPCD (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Fix link parameter use in lack of a valid DPCD (rev2)
URL   : https://patchwork.freedesktop.org/series/95948/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8f1a6421dfe5 drm/i915/dp: Skip the HW readout of DPCD on disabled encoders
4de2ca096081 drm/i915/dp: Ensure sink rate values are always valid
-:42: WARNING:TYPO_SPELLING: 'initialzing' may be misspelled - perhaps 'initializing'?
#42: 
v2: Clear the default sink rates, before initialzing these for eDP.
                                         ^^^^^^^^^^^

total: 0 errors, 1 warnings, 0 checks, 29 lines checked
ef437e0c551b drm/i915/dp: Ensure max link params are always valid
66b542816538 drm/i915/dp: Ensure sink/link max lane count values are always valid
f2bd5e3e941b drm/i915/dp: Sanitize sink rate DPCD register values
-:15: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#15: 
buggy monitor). So fixup the invalid DPCD sink rate values already and print

total: 0 errors, 1 warnings, 0 checks, 33 lines checked
d94f0647dd78 drm/i915/dp: Sanitize link common rate array lookups
-:45: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#45: FILE: drivers/gpu/drm/i915/display/intel_dp.c:622:
+							      intel_dp_common_rate(intel_dp, index - 1),

total: 0 errors, 1 warnings, 0 checks, 77 lines checked