[Intel-gfx] [PATCH] drm/i915/psr2: Do full fetches when doing async flips
José Roberto de Souza
jose.souza at intel.com
Wed Oct 27 18:48:55 UTC 2021
Async flips are not supported by selective fetch and we had a check
for that but that check was only executed when doing modesets.
So moving this check to the page flip path, so it can be properly
handled.
This fix a failure in kms_async_flips at test-cursor.
Cc: Mika Kahola <mika.kahola at intel.com>
Cc: Jouni Hogander <jouni.hogander at intel.com>
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8d08e3cf08c1f..ce6850ed72c60 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -729,12 +729,6 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
return false;
}
- if (crtc_state->uapi.async_flip) {
- drm_dbg_kms(&dev_priv->drm,
- "PSR2 sel fetch not enabled, async flip enabled\n");
- return false;
- }
-
/* Wa_14010254185 Wa_14010103792 */
if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_C0)) {
drm_dbg_kms(&dev_priv->drm,
@@ -1592,6 +1586,8 @@ static bool psr2_sel_fetch_pipe_state_supported(const struct intel_crtc_state *c
{
if (crtc_state->scaler_state.scaler_id >= 0)
return false;
+ if (crtc_state->uapi.async_flip)
+ return false;
return true;
}
--
2.33.1
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