[Intel-gfx] [PATCH] drm/i915/dsc: Fix the usage of uncompressed bpp
Navare, Manasi
manasi.d.navare at intel.com
Wed Oct 27 19:26:47 UTC 2021
On Wed, Oct 27, 2021 at 03:23:16PM +0530, Vandita Kulkarni wrote:
> DP 1.4 spec limits max compression bpp to
> uncompressed bpp -1, which is supported from
> XELPD onwards.
> Instead of uncompressed bpp, max dsc input bpp
> was being used to limit the max compression bpp.
So the input Pipe BPP which is the uncompressed bpp is decided by the input bpc
and when this was initially written, we had designed it to respect the max_req_bpc by the user.
So that is what we use to decide the input bpc and hence the pipe_bpp
This input pipe_bpp decides the compressed bpp that we calculate based on all the supported output bpps
which are supported all the way upto uncompressed_output_bpp - 1.
So I dont see the need to change the logic here. Moreover I dont see any change in the dsc_compute_bpp function
So I dont understand the purpose of introducing the new max_dsc_pipe_bpp variable here
Manasi
>
> Fixes: 831d5aa96c97 ("drm/i915/xelpd: Support DP1.4 compression BPPs")
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9d8132dd4cc5..1f7e666ae490 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1322,7 +1322,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> const struct drm_display_mode *adjusted_mode =
> &pipe_config->hw.adjusted_mode;
> - int pipe_bpp;
> + int pipe_bpp, max_dsc_pipe_bpp;
> int ret;
>
> pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> @@ -1331,7 +1331,8 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> if (!intel_dp_supports_dsc(intel_dp, pipe_config))
> return -EINVAL;
>
> - pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> + pipe_bpp = pipe_config->pipe_bpp;
> + max_dsc_pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
>
> /* Min Input BPC for ICL+ is 8 */
> if (pipe_bpp < 8 * 3) {
> @@ -1345,7 +1346,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> * Optimize this later for the minimum possible link rate/lane count
> * with DSC enabled for the requested mode.
> */
> - pipe_config->pipe_bpp = pipe_bpp;
> + pipe_config->pipe_bpp = max_dsc_pipe_bpp;
> pipe_config->port_clock = limits->max_rate;
> pipe_config->lane_count = limits->max_lane_count;
>
> --
> 2.32.0
>
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