[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support (rev3)

[Patchwork]

== Series Details ==

Series: i915: Initial multi-tile support (rev3)
URL   : https://patchwork.freedesktop.org/series/95631/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
1705fd0a9784 drm/i915: rework some irq functions to take intel_gt as argument
-:17: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-authored-by:
#17: 
Co-authored-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

total: 0 errors, 1 warnings, 0 checks, 75 lines checked
d1ad37e3e59f drm/i915: split general MMIO setup from per-GT uncore init
4e2ff0a014f1 drm/i915: Restructure probe to handle multi-tile platforms
aaf60d368b8d drm/i915: Store backpointer to GT in uncore
563ae5d397db drm/i915: Prepare for multiple gts
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id__' - possible side-effects?
#157: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:91:
+#define for_each_gt(i915__, id__, gt__) \
+	for ((id__) = 0; \
+	     (id__) < I915_MAX_TILES; \
+	     (id__)++) \
+		for_each_if(((gt__) = (i915__)->gts[(id__)]))

total: 0 errors, 0 warnings, 1 checks, 206 lines checked
bc3dd39b8aba drm/i915: Initial support for per-tile uncore
01e6c40393ac drm/i915/xehp: Determine which tile raised an interrupt
18b82f7a6cad drm/i915/xehp: Make IRQ reset and postinstall multi-tile aware
92457e660ec4 drm/i915/guc: Update CT debug macro for multi-tile
c69ad9b4c31f drm/i915/xehpsdv: Initialize multi-tiles
-:23: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-authored-by:
#23: 
Co-authored-by: Matt Roper <matthew.d.roper at intel.com>

-:263: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#263: FILE: drivers/gpu/drm/i915/i915_pci.c:1012:
+#define XE_HP_SDV_ENGINES \
+	BIT(BCS0) | \
+	BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) | \
+	BIT(VCS0) | BIT(VCS1) | BIT(VCS2) | BIT(VCS3) | \
+	BIT(VCS4) | BIT(VCS5) | BIT(VCS6) | BIT(VCS7)

total: 1 errors, 1 warnings, 0 checks, 284 lines checked