[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Panel replay phase1 implementation

[Patchwork]

== Series Details ==

Series: Panel replay phase1 implementation
URL   : https://patchwork.freedesktop.org/series/94470/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
c7704eae2ab0 drm/i915/panelreplay: update plane selective fetch register definition
-:8: WARNING:TYPO_SPELLING: 'difinition' may be misspelled - perhaps 'definition'?
#8: 
so updated the plane selective fetch register difinition accordingly.
                                              ^^^^^^^^^^

-:78: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#78: FILE: drivers/gpu/drm/i915/i915_reg.h:7494:
+#define PLANE_SEL_FETCH_CTL(dev_priv, pipe, plane) _MMIO(_SEL_FETCH_PLANE_BASE(dev_priv, pipe, plane) + \

-:87: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#87: FILE: drivers/gpu/drm/i915/i915_reg.h:7500:
+#define PLANE_SEL_FETCH_POS(dev_priv, pipe, plane) _MMIO(_SEL_FETCH_PLANE_BASE(dev_priv, pipe, plane) + \

-:95: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#95: FILE: drivers/gpu/drm/i915/i915_reg.h:7505:
+#define PLANE_SEL_FETCH_SIZE(dev_priv, pipe, plane) _MMIO(_SEL_FETCH_PLANE_BASE(dev_priv, pipe, plane) + \

-:103: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#103: FILE: drivers/gpu/drm/i915/i915_reg.h:7510:
+#define PLANE_SEL_FETCH_OFFSET(dev_priv, pipe, plane) _MMIO(_SEL_FETCH_PLANE_BASE(dev_priv, pipe, plane) + \

total: 0 errors, 5 warnings, 0 checks, 85 lines checked
03948896e7b6 drm/i915/panelreplay: Feature flag added for panel replay
7d7858afd7c3 drm/i915/panelreplay: Initializaton and compute config for panel replay
9432d1630bf8 drm/i915/panelreplay: enable/disable panel replay
959cdcb164d3 drm/i915/panelreplay: Added state checker for panel replay state