[Intel-gfx] [PATCH 1/1] drm/i915/adlp: Keep hardware default dbox B credits

[Souza, Jose]

On Wed, 2021-09-15 at 10:10 -0700, Yokoyama, Caz wrote:
> From: Caz Yokoyama <caz.yokoyama at intel.com>
> 
> Do not overwrite registers that don't need to change from default
> value to 0.

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> 
> bspec 49213
> Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> Cc: José Roberto de Souza <jose.souza at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Caz Yokoyama <caz.yokoyama at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a7ca38613f89..9190a3bc28a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2955,18 +2955,23 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc, bool joined_mbus)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
> -	u32 val;
> +	u32 val = intel_de_read(dev_priv, PIPE_MBUS_DBOX_CTL(pipe));
>  
> +	val &= ~MBUS_DBOX_A_CREDIT_MASK;
>  	/* Wa_22010947358:adl-p */
>  	if (IS_ALDERLAKE_P(dev_priv))
> -		val = joined_mbus ? MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
> +		val |= joined_mbus ? MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
>  	else
> -		val = MBUS_DBOX_A_CREDIT(2);
> +		val |= MBUS_DBOX_A_CREDIT(2);
>  
> -	if (DISPLAY_VER(dev_priv) >= 12) {
> +	if (IS_ALDERLAKE_P(dev_priv)) {
> +		/* Take effect hardware default MBUS_DBOX_B_CREDIT(8) */
> +	} else if (DISPLAY_VER(dev_priv) >= 12) {
> +		val &= ~(MBUS_DBOX_BW_CREDIT_MASK | MBUS_DBOX_B_CREDIT_MASK);
>  		val |= MBUS_DBOX_BW_CREDIT(2);
>  		val |= MBUS_DBOX_B_CREDIT(12);
>  	} else {
> +		val &= ~(MBUS_DBOX_BW_CREDIT_MASK | MBUS_DBOX_B_CREDIT_MASK);
>  		val |= MBUS_DBOX_BW_CREDIT(1);
>  		val |= MBUS_DBOX_B_CREDIT(8);
>  	}