[Intel-gfx] [PATCH 04/14] drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg

[Lisovskiy, Stanislav]

On Fri, May 14, 2021 at 03:57:41PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> The w/a database lists this for both ctg and elk. So let's apply it to
> elk as well. And add the w/a name.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8a08a7c0e71f..661bc6fdf38c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1152,17 +1152,13 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
>  	cpp = plane_state->hw.fb->format->cpp[0];
>  
>  	/*
> -	 * Not 100% sure which way ELK should go here as the
> -	 * spec only says CL/CTG should assume 32bpp and BW
> -	 * doesn't need to. But as these things followed the
> -	 * mobile vs. desktop lines on gen3 as well, let's
> -	 * assume ELK doesn't need this.
> +	 * WaUse32BppForSRWM:ctg,elk
>  	 *
> -	 * The spec also fails to list such a restriction for
> -	 * the HPLL watermark, which seems a little strange.
> +	 * The spec fails to list this restriction for the
> +	 * HPLL watermark, which seems a little strange.
>  	 * Let's use 32bpp for the HPLL watermark as well.
>  	 */
> -	if (IS_GM45(dev_priv) && plane->id == PLANE_PRIMARY &&
> +	if (plane->id == PLANE_PRIMARY &&

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>

>  	    level != G4X_WM_LEVEL_NORMAL)
>  		cpp = max(cpp, 4u);
>  
> -- 
> 2.26.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx