[Intel-gfx] [PATCH v2 3/6] drm/i915/uncore: Replace gen8 write functions with general fwtable

[Tvrtko Ursulin]

On 10/09/2021 21:10, Matt Roper wrote:
> Now that we have both a standard forcewake table (albeit a single-entry
> table) and the shadow table stored in the uncore, we can drop the
> gen8-specific write handlers in favor of the general fwtable version.
> 
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_uncore.c | 13 +------------
>   1 file changed, 1 insertion(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 5fa2bf26a948..4c6898746d10 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1046,16 +1046,6 @@ gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg)
>   	return FORCEWAKE_RENDER;
>   }
>   
> -#define __gen8_reg_write_fw_domains(uncore, offset) \
> -({ \
> -	enum forcewake_domains __fwd; \
> -	if (NEEDS_FORCE_WAKE(offset) && !is_shadowed(uncore, offset)) \
> -		__fwd = FORCEWAKE_RENDER; \
> -	else \
> -		__fwd = 0; \
> -	__fwd; \
> -})
> -
>   static const struct intel_forcewake_range __gen6_fw_ranges[] = {
>   	GEN_FW_RANGE(0x0, 0x3ffff, FORCEWAKE_RENDER),
>   };
> @@ -1711,7 +1701,6 @@ __gen_write(func, 32)
>   __gen_reg_write_funcs(gen12_fwtable);
>   __gen_reg_write_funcs(gen11_fwtable);
>   __gen_reg_write_funcs(fwtable);
> -__gen_reg_write_funcs(gen8);
>   
>   #undef __gen_reg_write_funcs
>   #undef GEN6_WRITE_FOOTER
> @@ -2121,7 +2110,7 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
>   	} else if (GRAPHICS_VER(i915) == 8) {
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen6_fw_ranges);
>   		ASSIGN_SHADOW_TABLE(uncore, gen8_shadowed_regs);
> -		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen8);
> +		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
>   		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
>   	} else if (IS_VALLEYVIEW(i915)) {
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __vlv_fw_ranges);
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko