[Intel-gfx] [PATCH v2 4/9] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled

[Souza, Jose]

On Thu, 2021-09-30 at 10:17 +0300, Gwan-gyeong Mun wrote:
> 
> On 9/30/21 3:14 AM, José Roberto de Souza wrote:
> > When PSR2 selective fetch is enabled writes to CURSURFLIVE alone do
> > not causes the panel to be updated when doing frontbuffer rendering.
> > 
> >  From what I was able to figure from experiments the writes to
> > CURSURFLIVE takes PSR2 from deep sleep but panel is not updated
> > because PSR2_MAN_TRK_CTL has no start and end region set.
> > 
> > As we don't have the dirt area from current flush and invalidate API
> > and even if we did userspace could do several draws to frontbuffer and
> > we would need a way to append all the damaged areas of all the draws
> > that need to be part of next frame.
> > 
> > So here only programing PSR2_MAN_TRK_CTL to do a single full frame
> > fetch.
> > 
> > It is a safe approach as if scanout is in the visible area
> > the single full frame will only be visible for hardware in the next
> > frame because of the double buffering, and if scanout is in vblank
> > area it will be draw in the current frame.
> > 
> > No need to disable PSR and wait a few miliseconds to enable it again.
> > 
> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> > ---
> >   drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++++++
> >   1 file changed, 12 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 8534cbb0d5144..7185801d5deff 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1397,10 +1397,22 @@ void intel_psr_resume(struct intel_dp *intel_dp)
> >   	mutex_unlock(&psr->lock);
> >   }
> >   
> > +static inline u32 man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private *dev_priv)
> > +{
> > +	return IS_ALDERLAKE_P(dev_priv) ?
> > +	       ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME :
> > +	       PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> > +}
> > +
> >   static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
> >   {
> >   	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >   
> > +	if (intel_dp->psr.psr2_sel_fetch_enabled)
> > +		intel_de_rmw(dev_priv,
> > +			     PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder), 0,
> > +			     man_trk_ctl_single_full_frame_bit_get(dev_priv));
> > +
> >   	/*
> >   	 * Display WA #0884: skl+
> The following details is described in the description related to Display 
> WA #0884, so I think it matches the commit message described above.
>   : Driver to issue a flip whenever a host modify occurs. This ensures 
> PSR exits its sleep state during a host modify event.
> 
> However, it is not clearly stated whether this WA# will also affect 
> GEN12+. Since there is a possibility that it may not work normally in HW 
> that will be released later, if you don't mind could you please leave a 
> comment that this operation has been confirmed in ADLP?

Yep, there is no official workaround for platforms after display 9 but it is being working so far.
Will include to the comment that it needs to be manually tested for future platforms.

> 
> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> >   	 * This documented WA for bxt can be safely applied
> >