[Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract intel_dp_tmds_clock_valid()

Shankar, Uma uma.shankar at intel.com
Fri Apr 1 06:19:38 UTC 2022



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx at lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract
> intel_dp_tmds_clock_valid()
> 
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> We're currently duplicating the DFP min/max TMDS clock checks in .mode_valid()
> and .compute_config(). Extract a helper suitable for both use cases.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar at intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 59 +++++++++++--------------
>  1 file changed, 26 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9e19165fd175..e874d2f78088 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -856,6 +856,25 @@ static bool intel_dp_hdisplay_bad(struct drm_i915_private
> *dev_priv,
>  	return hdisplay == 4096 && !HAS_DDI(dev_priv);  }
> 
> +static enum drm_mode_status
> +intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
> +			  int clock, int bpc, bool ycbcr420_output) {
> +	int tmds_clock;
> +
> +	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
> +
> +	if (intel_dp->dfp.min_tmds_clock &&
> +	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> +		return MODE_CLOCK_LOW;
> +
> +	if (intel_dp->dfp.max_tmds_clock &&
> +	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> +		return MODE_CLOCK_HIGH;
> +
> +	return MODE_OK;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  			       const struct drm_display_mode *mode, @@ -863,7
> +882,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,  {
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
>  	const struct drm_display_info *info = &connector->base.display_info;
> -	int tmds_clock;
> 
>  	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
>  	if (intel_dp->dfp.pcon_max_frl_bw) {
> @@ -889,17 +907,8 @@ intel_dp_mode_valid_downstream(struct intel_connector
> *connector,
>  		return MODE_CLOCK_HIGH;
> 
>  	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> -	tmds_clock = intel_hdmi_tmds_clock(target_clock, 8,
> -					   drm_mode_is_420_only(info, mode));
> -
> -	if (intel_dp->dfp.min_tmds_clock &&
> -	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> -		return MODE_CLOCK_LOW;
> -	if (intel_dp->dfp.max_tmds_clock &&
> -	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> -		return MODE_CLOCK_HIGH;
> -
> -	return MODE_OK;
> +	return intel_dp_tmds_clock_valid(intel_dp, target_clock, 8,
> +					 drm_mode_is_420_only(info, mode));
>  }
> 
>  static bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, @@ -1142,32
> +1151,16 @@ static bool intel_dp_hdmi_ycbcr420(struct intel_dp *intel_dp,
>  		 intel_dp->dfp.ycbcr_444_to_420);
>  }
> 
> -static bool intel_dp_hdmi_tmds_clock_valid(struct intel_dp *intel_dp,
> -					   const struct intel_crtc_state *crtc_state,
> int bpc)
> -{
> -	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> -	int tmds_clock = intel_hdmi_tmds_clock(clock, bpc,
> -					       intel_dp_hdmi_ycbcr420(intel_dp,
> crtc_state));
> -
> -	if (intel_dp->dfp.min_tmds_clock &&
> -	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> -		return false;
> -
> -	if (intel_dp->dfp.max_tmds_clock &&
> -	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> -		return false;
> -
> -	return true;
> -}
> -
>  static bool intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
>  				       const struct intel_crtc_state *crtc_state,
>  				       int bpc)
>  {
> +	bool ycbcr420_output = intel_dp_hdmi_ycbcr420(intel_dp, crtc_state);
> +	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> 
> -	return intel_hdmi_bpc_possible(crtc_state, bpc, intel_dp->has_hdmi_sink,
> -				       intel_dp_hdmi_ycbcr420(intel_dp, crtc_state))
> &&
> -		intel_dp_hdmi_tmds_clock_valid(intel_dp, crtc_state, bpc);
> +	return intel_hdmi_bpc_possible(crtc_state, bpc,
> +				       intel_dp->has_hdmi_sink, ycbcr420_output) &&
> +		intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output)
> ==
> +MODE_OK;
>  }
> 
>  static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> --
> 2.34.1



More information about the Intel-gfx mailing list