[Intel-gfx] [CI] drm/i915/uncore: keep track of last mmio accesses
Lucas De Marchi
lucas.demarchi at intel.com
Mon Apr 4 18:15:55 UTC 2022
On Mon, Apr 04, 2022 at 10:34:53AM -0700, Lucas De Marchi wrote:
>Sine gen6 we use FPGA_DBG register to detect unclaimed MMIO registers.
>This register is in the display engine IP and can only ever detect
>unclaimed accesses to registers in this area. However sometimes there
>are reports of this triggering for registers in other areas, which
>should not be possible.
>
>This keeps track of the last 4 registers which should hopefully be
>sufficient to understand where these are coming from. And without
>increasing the debug struct too much:
>
>Before:
> struct intel_uncore_mmio_debug {
> spinlock_t lock; /* 0 64 */
> /* --- cacheline 1 boundary (64 bytes) --- */
> int unclaimed_mmio_check; /* 64 4 */
> int saved_mmio_check; /* 68 4 */
> u32 suspend_count; /* 72 4 */
>
> /* size: 80, cachelines: 2, members: 4 */
> /* padding: 4 */
> /* last cacheline: 16 bytes */
> };
>
>After:
> struct intel_uncore_mmio_debug {
> spinlock_t lock; /* 0 64 */
> /* --- cacheline 1 boundary (64 bytes) --- */
> int unclaimed_mmio_check; /* 64 4 */
> int saved_mmio_check; /* 68 4 */
> u32 last_reg[4]; /* 72 16 */
> u32 last_reg_pos; /* 88 4 */
> u32 suspend_count; /* 92 4 */
>
> /* size: 96, cachelines: 2, members: 6 */
> /* last cacheline: 32 bytes */
> };
>
>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>---
>
>Sending this for CI only for now, to get it running and hopefully
>reproduce the issues we are seeing. I didn't reproduce the issue
>mentioned with this patch applied yet.
nvm, found a way to reproduce it locally and fix up the output
reporting. I canceled the CI execution and will submit it again.
Lucas De Marchi
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