[Intel-gfx] [PATCH 08/10] drm/i915/guc: Apply Wa_16011777198
John Harrison
john.c.harrison at intel.com
Fri Apr 15 00:15:55 UTC 2022
On 4/13/2022 12:27, Umesh Nerlige Ramappa wrote:
> From: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
>
> Enable GuC Wa to reset RCS/CCS before it goes into RC6.
>
> v2: Comments from Matt R.
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
Reviewed-by: John Harrison <John.C.Harrison at Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 5 +++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index fd04c4cd9d44..830889349756 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -310,6 +310,11 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
> if (GRAPHICS_VER(gt->i915) == 12)
> flags |= GUC_WA_PRE_PARSER;
>
> + /* Wa_16011777198:dg2 */
> + if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
> + IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))
> + flags |= GUC_WA_RCS_RESET_BEFORE_RC6;
> +
> return flags;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index fe5751f67b19..126e67ea1619 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -100,6 +100,7 @@
> #define GUC_CTL_WA 1
> #define GUC_WA_GAM_CREDITS BIT(10)
> #define GUC_WA_DUAL_QUEUE BIT(11)
> +#define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
> #define GUC_WA_PRE_PARSER BIT(14)
> #define GUC_WA_POLLCS BIT(18)
>
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